[Mlir-commits] [mlir] [NFC][OpenMP][MLIR] Add MLIR test for lowering parallel if (PR #71788)

[Dominik Adamski]

https://github.com/DominikAdamski updated https://github.com/llvm/llvm-project/pull/71788

>From 6682a449d63caec7256f6611aac850df9b607459 Mon Sep 17 00:00:00 2001
From: Dominik Adamski <dominik.adamski at amd.com>
Date: Wed, 8 Nov 2023 01:55:51 -0600
Subject: [PATCH 1/2] [NFC][OpenMP][MLIR] Add MLIR test for lowering parallel
 if

Add test for clause omp target parallel if (parallel : cond )

Test checks if corresponding MLIR construct is correctly lowered
to LLVM IR.
---
 .../LLVMIR/omptarget-parallel-llvm.mlir       | 31 +++++++++++++++++++
 1 file changed, 31 insertions(+)

diff --git a/mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir b/mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
index 2628e42d533b50e..4628a5f486b4468 100644
--- a/mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
+++ b/mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
@@ -32,6 +32,26 @@ module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memo
     }
   llvm.return
   }
+
+  llvm.func @parallel_if(%arg0: !llvm.ptr {fir.bindc_name = "ifcond"}) {
+    %0 = llvm.mlir.constant(1 : i64) : i64
+    %1 = llvm.alloca %0 x i32 {bindc_name = "d"} : (i64) -> !llvm.ptr
+    %2 = omp.map_info var_ptr(%1 : !llvm.ptr, i32) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = "d"}
+    %3 = omp.map_info var_ptr(%arg0 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = "ifcond"}
+    omp.target map_entries(%2 -> %arg1, %3 -> %arg2 : !llvm.ptr, !llvm.ptr) {
+    ^bb0(%arg1: !llvm.ptr, %arg2: !llvm.ptr):
+      %4 = llvm.mlir.constant(10 : i32) : i32
+      %5 = llvm.load %arg2 : !llvm.ptr -> i32
+      %6 = llvm.mlir.constant(0 : i64) : i32
+      %7 = llvm.icmp "ne" %5, %6 : i32
+      omp.parallel if(%7 : i1) {
+        llvm.store %4, %arg1 : i32, !llvm.ptr
+        omp.terminator
+      }
+      omp.terminator
+    }
+    llvm.return
+  }
 }
 
 // CHECK: define weak_odr protected amdgpu_kernel void [[FUNC0:@.*]](
@@ -64,3 +84,14 @@ module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memo
 // CHECK-SAME:  ptr addrspace(1) @[[NUM_THREADS_GLOB:[0-9]+]] to ptr),
 // CHECK-SAME:  i32 [[NUM_THREADS_TMP0:%.*]], i32 1, i32 156,
 // CHECK-SAME:  i32 -1,  ptr [[FUNC_NUM_THREADS1:@.*]], ptr null, ptr [[NUM_THREADS_TMP1:%.*]], i64 1)
+
+// CHECK: define weak_odr protected amdgpu_kernel void [[FUNC2:@.*]](
+// CHECK-SAME: ptr [[IFCOND_ARG0:%.*]], ptr [[IFCOND_ARG1:.*]], ptr [[IFCOND_ARG2:.*]]) {
+// CHECK:         store ptr [[IFCOND_ARG2]], ptr [[IFCOND_TMP1:%.]], align 8
+// CHECK:         [[IFCOND_TMP2:%.*]] = load i32, ptr [[IFCOND_TMP1]], align 4
+// CHECK:         [[IFCOND_TMP3:%.*]] = icmp ne i32 [[IFCOND_TMP2]], 0
+// CHECK:         [[IFCOND_TMP4:%.*]] = sext i1 [[IFCOND_TMP3]] to i32
+// CHECK:         call void @__kmpc_parallel_51(ptr addrspacecast (
+// CHECK-SAME:  ptr addrspace(1) @[[IFCOND_GLOB:[0-9]+]] to ptr),
+// CHECK-SAME:  i32 [[IFCOND_THREAD_NUM:%.*]], i32 [[IFCOND_TMP4]], i32 -1,
+// CHECK-SAME:  i32 -1,  ptr [[FUNC1:@.*]], ptr null, ptr [[IFCOND_TMP5:%.*]], i64 1)

>From 1116ab8b6ec9cd9795f425584374e82e6e420567 Mon Sep 17 00:00:00 2001
From: Dominik Adamski <dominik.adamski at amd.com>
Date: Fri, 17 Nov 2023 07:26:32 -0600
Subject: [PATCH 2/2] Added comments

---
 .../test/Target/LLVMIR/omptarget-parallel-llvm.mlir | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir b/mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
index 4628a5f486b4468..e804bf9a1c039ba 100644
--- a/mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
+++ b/mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
@@ -78,6 +78,9 @@ module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memo
 // CHECK: define internal void [[FUNC1]](
 // CHECK-SAME: ptr noalias noundef [[TID_ADDR_ASCAST:%.*]], ptr noalias noundef [[ZERO_ADDR_ASCAST:%.*]], ptr [[TMP0:%.*]]) #[[ATTR0:[0-9]+]] {
 
+// Test if num_threads OpenMP clause for target region is correctly lowered
+// and passed as a param to kmpc_parallel_51 function
+
 // CHECK: define weak_odr protected amdgpu_kernel void [[FUNC_NUM_THREADS0:@.*]](
 // CHECK-NOT:     call void @__kmpc_push_num_threads(
 // CHECK:         call void @__kmpc_parallel_51(ptr addrspacecast (
@@ -85,6 +88,16 @@ module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memo
 // CHECK-SAME:  i32 [[NUM_THREADS_TMP0:%.*]], i32 1, i32 156,
 // CHECK-SAME:  i32 -1,  ptr [[FUNC_NUM_THREADS1:@.*]], ptr null, ptr [[NUM_THREADS_TMP1:%.*]], i64 1)
 
+// The one of arguments of  kmpc_parallel_51 function is responsible for handling if clause
+// of omp parallel construct for target region. If this  argument is nonzero,
+// then kmpc_parallel_51 launches multiple threads for parallel region.
+//
+// This test checks if MLIR expression:
+//      %7 = llvm.icmp "ne" %5, %6 : i32
+//      omp.parallel if(%7 : i1)
+// is correctly lowered to LLVM IR code and the if condition variable
+// is passed as a param to kmpc_parallel_51 function
+
 // CHECK: define weak_odr protected amdgpu_kernel void [[FUNC2:@.*]](
 // CHECK-SAME: ptr [[IFCOND_ARG0:%.*]], ptr [[IFCOND_ARG1:.*]], ptr [[IFCOND_ARG2:.*]]) {
 // CHECK:         store ptr [[IFCOND_ARG2]], ptr [[IFCOND_TMP1:%.]], align 8