[Mlir-commits] [mlir] [NFC] Simplify the tiling implementation using cloning. (PR #72178)
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Tue Nov 14 23:07:00 PST 2023
================
@@ -374,8 +374,8 @@ module attributes {transform.with_named_sequence} {
// CHECK: %[[IN_J:.*]] = affine.apply #[[MAP2]](%[[J]])[%[[TILE_1]]]
// CHECK: %[[IN_J_SZ:.*]] = affine.min #[[MAP3]](%[[OUT_J_SZ]], %[[J]])[%[[TILE_1]], %[[IN_D1]]]
// CHECK: %[[SUB_IN:.*]] = tensor.extract_slice %[[IN]][%[[IN_I]], %[[IN_J]]] [%[[IN_I_SZ]], %[[IN_J_SZ]]] [1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
-// CHECK: %[[OUT_D2:.+]] = tensor.dim %[[OUT]], %[[C2]]
----------------
MaheshRavishankar wrote:
Its just a quirk of what is used for `tensor.dim`. `out` and `iter1` have the same size.
https://github.com/llvm/llvm-project/pull/72178
More information about the Mlir-commits
mailing list