[Mlir-commits] [mlir] [mlir][vector][spirv] Lower vector.load and vector.store to SPIR-V (PR #71674)

Lei Zhang llvmlistbot at llvm.org
Wed Nov 8 21:39:16 PST 2023


================
@@ -631,3 +631,105 @@ func.func @shape_cast_size1_vector(%arg0 : vector<f32>) -> vector<1xf32> {
   %1 = vector.shape_cast %arg0 : vector<f32> to vector<1xf32>
   return %1 : vector<1xf32>
 }
+
+// -----
+
+module attributes {
+  spirv.target_env = #spirv.target_env<
+    #spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>>
----------------
antiagainst wrote:

Hmm, this kinda of pointer bitcasting typically is not valid in `Shader` capabilities--it would nomrally require `Kernel` capabilities. You can find details in https://registry.khronos.org/SPIR-V/specs/unified1/SPIRV.html#_validation_rules (warning: very hard to parse through..) Are you actually using these patterns for graphics APIs like Vulkan? Or are you doing it for compute APIs like OpenCL?

We probably need to add a validation rule in `spirv.module` op for this; but here we aren't using `spirv.module` op anyway so it won't kick in. I'd suggest to make it `#spirv.vce<v1.0, [Kernel], []>` to be clear though.

https://github.com/llvm/llvm-project/pull/71674


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