[Mlir-commits] [mlir] [mlir][memref] Add memref alias folding for masked transfers (PR #71476)
Quinn Dawkins
llvmlistbot at llvm.org
Tue Nov 7 05:41:16 PST 2023
================
@@ -266,6 +266,127 @@ func.func @fold_vector_transfer_write_with_inner_rank_reduced_subview(
// -----
+func.func @fold_masked_vector_transfer_read_with_subview(
+ %arg0 : memref<?x?xf32, strided<[?, ?], offset: ?>>,
+ %arg1: index, %arg2 : index, %arg3 : index, %arg4: index, %arg5 : index,
+ %arg6 : index, %mask : vector<4xi1>) -> vector<4xf32> {
+ %cst = arith.constant 0.0 : f32
+ %0 = memref.subview %arg0[%arg1, %arg2] [%arg3, %arg4] [1, 1]
+ : memref<?x?xf32, strided<[?, ?], offset: ?>> to
+ memref<?x?xf32, strided<[?, ?], offset: ?>>
+ %1 = vector.transfer_read %0[%arg5, %arg6], %cst, %mask {in_bounds = [true]}
+ : memref<?x?xf32, strided<[?, ?], offset: ?>>, vector<4xf32>
+ return %1 : vector<4xf32>
+}
+// CHECK-DAG: #[[MAP1:.+]] = affine_map<()[s0, s1] -> (s0 + s1)>
+// CHECK: func @fold_masked_vector_transfer_read_with_subview
+// CHECK-SAME: %[[ARG0:[a-zA-Z0-9]+]]: memref<?x?xf32, strided<[?, ?], offset: ?>>
+// CHECK-SAME: %[[ARG1:[a-zA-Z0-9]+]]: index
+// CHECK-SAME: %[[ARG2:[a-zA-Z0-9]+]]: index
+// CHECK-SAME: %[[ARG3:[a-zA-Z0-9]+]]: index
+// CHECK-SAME: %[[ARG4:[a-zA-Z0-9]+]]: index
+// CHECK-SAME: %[[ARG5:[a-zA-Z0-9]+]]: index
+// CHECK-SAME: %[[ARG6:[a-zA-Z0-9]+]]: index
+// CHECK-SAME: %[[MASK:[a-zA-Z0-9]+]]: vector<4xi1>
+// CHECK-DAG: %[[IDX0:.+]] = affine.apply #[[MAP1]]()[%[[ARG1]], %[[ARG5]]]
+// CHECK-DAG: %[[IDX1:.+]] = affine.apply #[[MAP1]]()[%[[ARG2]], %[[ARG6]]]
+// CHECK: vector.transfer_read %[[ARG0]][%[[IDX0]], %[[IDX1]]], %{{.*}}, %[[MASK]] {{.*}} : memref<?x?xf32
----------------
qedawkins wrote:
Should I keep both tests, or only the rank reducing one?
https://github.com/llvm/llvm-project/pull/71476
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