[Mlir-commits] [mlir] [MLIR][Vector] Add support for distributing masked writes (PR #71482)
Lei Zhang
llvmlistbot at llvm.org
Mon Nov 6 22:11:49 PST 2023
antiagainst wrote:
Actually given we are only handling 1-D distribution in transfer write at the moment, and the fact we are [compressing unused dims when `inferTransferOpMaskType`](https://github.com/llvm/llvm-project/blob/main/mlir/lib/Dialect/Vector/IR/VectorOps.cpp#L3758-L3773), effectively that guarantees we have the same shape as the vector type? I'm a bit confused now; better to get @dcaballe to take another look.
We can enable support step-by-step. The current impl is fine if we additionally check the transfer write has an identity map I think.
https://github.com/llvm/llvm-project/pull/71482
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