[Mlir-commits] [mlir] [mlir][ArmSME] Add mask operand to store_tile_slice (PR #70838)

[Cullen Rhodes]

================
@@ -489,22 +492,27 @@ def StoreTileSliceOp : ArmSME_Op<"store_tile_slice"> {
     dimensions since the operation is scalable, and the element type must be a
     scalar that matches the element type of the input tile.
 
+    An SSA value `mask` specifies to mask out elements written to the MemRef.
+    The `mask` type is an `i1` vector with a shape that matches how elements
+    are written to the MemRef.
----------------
c-rhodes wrote:

Yeah that's a lot clearer cheers, I was lazy and copied this from `transfer_write`

https://github.com/llvm/llvm-project/pull/70838