[Mlir-commits] [mlir] 81d2892 - [mlir][sparse] Updating STEA documentation examples to use "lvlTypes"
wren romano
llvmlistbot at llvm.org
Fri May 19 13:01:09 PDT 2023
Author: wren romano
Date: 2023-05-19T13:01:01-07:00
New Revision: 81d28921da8e7478689bdcd6da965138b01837bc
URL: https://github.com/llvm/llvm-project/commit/81d28921da8e7478689bdcd6da965138b01837bc
DIFF: https://github.com/llvm/llvm-project/commit/81d28921da8e7478689bdcd6da965138b01837bc.diff
LOG: [mlir][sparse] Updating STEA documentation examples to use "lvlTypes"
Followup to D150330.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D150920
Added:
Modified:
mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td b/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
index 505231045aa8..f8a66b349874 100644
--- a/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
+++ b/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td
@@ -144,11 +144,6 @@ def SparseTensorEncodingAttr : SparseTensor_Attr<"SparseTensorEncoding",
properties, and split up how the level-format and properties are
specified rather than using this suffix mechanism.
- TODO: This field is called "dimLevelType" for historical reasons,
- even though the types are per-level rather than per-dimension.
- (This will be corrected in an upcoming change that completely
- overhauls the syntax of this attribute.)
-
- An optional permutation which maps (higher-ordering)-coordinates
to level-coordinates; defaulting to the identity permutation.
For example, given a 2-d tensor with the default higher-ordering,
@@ -213,19 +208,19 @@ def SparseTensorEncodingAttr : SparseTensor_Attr<"SparseTensorEncoding",
```mlir
// Sparse vector.
#SparseVector = #sparse_tensor.encoding<{
- dimLevelType = [ "compressed" ]
+ lvlTypes = [ "compressed" ]
}>
... tensor<?xf32, #SparseVector> ...
// Sorted Coordinate Scheme.
#SortedCOO = #sparse_tensor.encoding<{
- dimLevelType = [ "compressed-nu", "singleton" ]
+ lvlTypes = [ "compressed-nu", "singleton" ]
}>
... tensor<?x?xf64, #SortedCOO> ...
// Doubly compressed sparse column storage with specific bitwidths.
#DCSC = #sparse_tensor.encoding<{
- dimLevelType = [ "compressed", "compressed" ],
+ lvlTypes = [ "compressed", "compressed" ],
dimOrdering = affine_map<(i, j) -> (j, i)>,
posWidth = 32,
crdWidth = 8
@@ -234,7 +229,7 @@ def SparseTensorEncodingAttr : SparseTensor_Attr<"SparseTensorEncoding",
// Block sparse row storage (2x3 blocks).
#BCSR = #sparse_tensor.encoding<{
- dimLevelType = [ "compressed", "compressed", "dense", "dense" ],
+ lvlTypes = [ "compressed", "compressed", "dense", "dense" ],
dimOrdering = affine_map<(ii, jj, i, j) -> (ii, jj, i, j)>,
higherOrdering = affine_map<(i, j) -> (i floordiv 2, j floordiv 3, i mod 2, j mod 3)>
}>
@@ -242,7 +237,7 @@ def SparseTensorEncodingAttr : SparseTensor_Attr<"SparseTensorEncoding",
// ELL storage (4 jagged diagonals, i.e., at most 4 nonzeros per row).
#ELL = #sparse_tensor.encoding<{
- dimLevelType = [ "dense", "dense", "compressed" ],
+ lvlTypes = [ "dense", "dense", "compressed" ],
dimOrdering = affine_map<(ii, i, j) -> (ii, i, j)>,
higherOrdering = affine_map<(i, j)[c] -> (c * 4 * i, i, j)>
}>
@@ -251,7 +246,7 @@ def SparseTensorEncodingAttr : SparseTensor_Attr<"SparseTensorEncoding",
// CSR slice (offset = 0, size = 4, stride = 1 on the first dimension;
// offset = 0, size = 8, and a dynamic stride on the second dimension).
#CSR_SLICE = #sparse_tensor.encoding<{
- dimLevelType = [ "dense", "compressed" ],
+ lvlTypes = [ "dense", "compressed" ],
slice = [ (0, 4, 1), (0, 8, ?) ]
}>
... tensor<?x?xf64, #CSC_SLICE> ...
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