[Mlir-commits] [mlir] d9d06d1 - [flang][openacc] Lower host and device clauses to data operand ops

Valentin Clement llvmlistbot at llvm.org
Fri May 5 12:02:12 PDT 2023


Author: Valentin Clement
Date: 2023-05-05T12:02:06-07:00
New Revision: d9d06d11ca89391bb6cd14cfa8594157b4550fdc

URL: https://github.com/llvm/llvm-project/commit/d9d06d11ca89391bb6cd14cfa8594157b4550fdc
DIFF: https://github.com/llvm/llvm-project/commit/d9d06d11ca89391bb6cd14cfa8594157b4550fdc.diff

LOG: [flang][openacc] Lower host and device clauses to data operand ops

Update OpenACC update construct lowering to create
the data operand operations for host and device clauses.

Depends on D149909

Reviewed By: razvanlupusoru, jeanPerier

Differential Revision: https://reviews.llvm.org/D149910

Added: 
    

Modified: 
    flang/lib/Lower/OpenACC.cpp
    flang/test/Lower/OpenACC/acc-update.f90
    flang/test/Lower/OpenACC/locations.f90
    mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

Removed: 
    


################################################################################
diff  --git a/flang/lib/Lower/OpenACC.cpp b/flang/lib/Lower/OpenACC.cpp
index c74c87b084977..fe7b34121e997 100644
--- a/flang/lib/Lower/OpenACC.cpp
+++ b/flang/lib/Lower/OpenACC.cpp
@@ -470,7 +470,8 @@ static void genDataExitOperations(fir::FirOpBuilder &builder,
     auto entryOp = mlir::dyn_cast_or_null<EntryOp>(operand.getDefiningOp());
     assert(entryOp && "data entry op expected");
     mlir::Value varPtr;
-    if constexpr (std::is_same_v<ExitOp, mlir::acc::CopyoutOp>)
+    if constexpr (std::is_same_v<ExitOp, mlir::acc::CopyoutOp> ||
+                  std::is_same_v<ExitOp, mlir::acc::UpdateHostOp>)
       varPtr = entryOp.getVarPtr();
     builder.create<ExitOp>(entryOp.getLoc(), entryOp.getAccPtr(), varPtr,
                            entryOp.getBounds(), entryOp.getDataClause(),
@@ -1438,8 +1439,8 @@ genACCUpdateOp(Fortran::lower::AbstractConverter &converter,
                Fortran::lower::StatementContext &stmtCtx,
                const Fortran::parser::AccClauseList &accClauseList) {
   mlir::Value ifCond, async, waitDevnum;
-  llvm::SmallVector<mlir::Value> hostOperands, deviceOperands, waitOperands,
-      deviceTypeOperands;
+  llvm::SmallVector<mlir::Value> dataClauseOperands, updateHostOperands,
+      waitOperands, deviceTypeOperands;
 
   // Async and wait clause have optional values but can be present with
   // no value as well. When there is no value, the op has an attribute to
@@ -1448,7 +1449,7 @@ genACCUpdateOp(Fortran::lower::AbstractConverter &converter,
   bool addWaitAttr = false;
   bool addIfPresentAttr = false;
 
-  fir::FirOpBuilder &firOpBuilder = converter.getFirOpBuilder();
+  fir::FirOpBuilder &builder = converter.getFirOpBuilder();
 
   // Lower clauses values mapped to operands.
   // Keep track of each group of operands separatly as clauses can appear
@@ -1472,15 +1473,19 @@ genACCUpdateOp(Fortran::lower::AbstractConverter &converter,
                           deviceTypeOperands, stmtCtx);
     } else if (const auto *hostClause =
                    std::get_if<Fortran::parser::AccClause::Host>(&clause.u)) {
-      genObjectList(hostClause->v, converter, semanticsContext, stmtCtx,
-                    hostOperands);
+      genDataOperandOperations<mlir::acc::GetDevicePtrOp>(
+          hostClause->v, converter, semanticsContext, stmtCtx,
+          updateHostOperands, mlir::acc::DataClause::acc_update_host, false);
     } else if (const auto *deviceClause =
                    std::get_if<Fortran::parser::AccClause::Device>(&clause.u)) {
-      genObjectList(deviceClause->v, converter, semanticsContext, stmtCtx,
-                    deviceOperands);
+      genDataOperandOperations<mlir::acc::UpdateDeviceOp>(
+          deviceClause->v, converter, semanticsContext, stmtCtx,
+          dataClauseOperands, mlir::acc::DataClause::acc_update_device, false);
     }
   }
 
+  dataClauseOperands.append(updateHostOperands);
+
   // Prepare the operand segment size attribute and the operands value range.
   llvm::SmallVector<mlir::Value> operands;
   llvm::SmallVector<int32_t> operandSegments;
@@ -1489,19 +1494,21 @@ genACCUpdateOp(Fortran::lower::AbstractConverter &converter,
   addOperand(operands, operandSegments, waitDevnum);
   addOperands(operands, operandSegments, waitOperands);
   addOperands(operands, operandSegments, deviceTypeOperands);
-  addOperands(operands, operandSegments, hostOperands);
-  addOperands(operands, operandSegments, deviceOperands);
-  operandSegments.push_back(0); // temporary for dataClauseOperands.
+  operandSegments.append({0, 0});
+  addOperands(operands, operandSegments, dataClauseOperands);
 
   mlir::acc::UpdateOp updateOp = createSimpleOp<mlir::acc::UpdateOp>(
-      firOpBuilder, currentLocation, operands, operandSegments);
+      builder, currentLocation, operands, operandSegments);
+
+  genDataExitOperations<mlir::acc::GetDevicePtrOp, mlir::acc::UpdateHostOp>(
+      builder, updateHostOperands, /*structured=*/false, /*implicit=*/false);
 
   if (addAsyncAttr)
-    updateOp.setAsyncAttr(firOpBuilder.getUnitAttr());
+    updateOp.setAsyncAttr(builder.getUnitAttr());
   if (addWaitAttr)
-    updateOp.setWaitAttr(firOpBuilder.getUnitAttr());
+    updateOp.setWaitAttr(builder.getUnitAttr());
   if (addIfPresentAttr)
-    updateOp.setIfPresentAttr(firOpBuilder.getUnitAttr());
+    updateOp.setIfPresentAttr(builder.getUnitAttr());
 }
 
 static void

diff  --git a/flang/test/Lower/OpenACC/acc-update.f90 b/flang/test/Lower/OpenACC/acc-update.f90
index 1b3aef2dc674b..7456ef62aa1f6 100644
--- a/flang/test/Lower/OpenACC/acc-update.f90
+++ b/flang/test/Lower/OpenACC/acc-update.f90
@@ -7,66 +7,105 @@ subroutine acc_update
   real, dimension(10, 10) :: a, b, c
   logical :: ifCondition = .TRUE.
 
-!CHECK: [[A:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
-!CHECK: [[B:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
-!CHECK: [[C:%.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
+!CHECK: %[[A:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ea"}
+!CHECK: %[[B:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Eb"}
+!CHECK: %[[C:.*]] = fir.alloca !fir.array<10x10xf32> {{{.*}}uniq_name = "{{.*}}Ec"}
 
   !$acc update host(a)
-!CHECK: acc.update host([[A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: acc.update dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
+
 
   !$acc update host(a) if(.true.)
-!CHECK: [[IF1:%.*]] = arith.constant true
-!CHECK: acc.update if([[IF1]]) host([[A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: %[[IF1:.*]] = arith.constant true
+! CHECK: acc.update if(%[[IF1]]) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) if(ifCondition)
-!CHECK: [[IFCOND:%.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
-!CHECK: [[IF2:%.*]] = fir.convert [[IFCOND]] : (!fir.logical<4>) -> i1
-!CHECK: acc.update if([[IF2]]) host([[A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: %[[IFCOND:.*]] = fir.load %{{.*}} : !fir.ref<!fir.logical<4>>
+! CHECK: %[[IF2:.*]] = fir.convert %[[IFCOND]] : (!fir.logical<4>) -> i1
+! CHECK: acc.update if(%[[IF2]]) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) host(b) host(c)
-!CHECK: acc.update host([[A]], [[B]], [[C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: %[[DEVPTR_B:.*]] = acc.getdeviceptr varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "b", structured = false}
+! CHECK: %[[DEVPTR_C:.*]] = acc.getdeviceptr varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "c", structured = false}
+! CHECK: acc.update dataOperands(%[[DEVPTR_A]], %[[DEVPTR_B]], %[[DEVPTR_C]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {name = "b", structured = false}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) {name = "c", structured = false}
 
   !$acc update host(a) host(b) device(c)
-!CHECK: acc.update host([[A]], [[B]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>) device([[C]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: %[[DEVPTR_B:.*]] = acc.getdeviceptr varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "b", structured = false}
+! CHECK: %[[DEVPTR_C:.*]] = acc.update_device varPtr(%[[C]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {name = "c", structured = false}
+! CHECK: acc.update dataOperands(%[[DEVPTR_C]], %[[DEVPTR_A]], %[[DEVPTR_B]] : !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>, !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_B]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[B]] : !fir.ref<!fir.array<10x10xf32>>) {name = "b", structured = false}
 
   !$acc update host(a) async
-!CHECK: acc.update host([[A]] : !fir.ref<!fir.array<10x10xf32>>) attributes {async}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: acc.update dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) attributes {async}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) wait
-!CHECK: acc.update host([[A]] : !fir.ref<!fir.array<10x10xf32>>) attributes {wait}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: acc.update dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) attributes {wait}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) async wait
-!CHECK: acc.update host([[A]] : !fir.ref<!fir.array<10x10xf32>>) attributes {async, wait}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: acc.update dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) attributes {async, wait}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) async(1)
-!CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.update async([[ASYNC1]] : i32) host([[A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: [[ASYNC1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.update async([[ASYNC1]] : i32) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) async(async)
-!CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
-!CHECK: acc.update async([[ASYNC2]] : i32) host([[A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: [[ASYNC2:%.*]] = fir.load %{{.*}} : !fir.ref<i32>
+! CHECK: acc.update async([[ASYNC2]] : i32) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) wait(1)
-!CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
-!CHECK: acc.update wait([[WAIT1]] : i32) host([[A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: [[WAIT1:%.*]] = arith.constant 1 : i32
+! CHECK: acc.update wait([[WAIT1]] : i32) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) wait(queues: 1, 2)
-!CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
-!CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
-!CHECK: acc.update wait([[WAIT2]], [[WAIT3]] : i32, i32) host([[A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: [[WAIT2:%.*]] = arith.constant 1 : i32
+! CHECK: [[WAIT3:%.*]] = arith.constant 2 : i32
+! CHECK: acc.update wait([[WAIT2]], [[WAIT3]] : i32, i32) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) wait(devnum: 1: queues: 1, 2)
-!CHECK: [[WAIT4:%.*]] = arith.constant 1 : i32
-!CHECK: [[WAIT5:%.*]] = arith.constant 2 : i32
-!CHECK: [[WAIT6:%.*]] = arith.constant 1 : i32
-!CHECK: acc.update wait_devnum([[WAIT6]] : i32) wait([[WAIT4]], [[WAIT5]] : i32, i32) host([[A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: [[WAIT4:%.*]] = arith.constant 1 : i32
+! CHECK: [[WAIT5:%.*]] = arith.constant 2 : i32
+! CHECK: [[WAIT6:%.*]] = arith.constant 1 : i32
+! CHECK: acc.update wait_devnum([[WAIT6]] : i32) wait([[WAIT4]], [[WAIT5]] : i32, i32) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>)
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) device_type(1, 2)
-!CHECK: [[DEVTYPE1:%.*]] = arith.constant 1 : i32
-!CHECK: [[DEVTYPE2:%.*]] = arith.constant 2 : i32
-!CHECK: acc.update device_type([[DEVTYPE1]], [[DEVTYPE2]] : i32, i32) host([[A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: [[DEVTYPE1:%.*]] = arith.constant 1 : i32
+! CHECK: [[DEVTYPE2:%.*]] = arith.constant 2 : i32
+! CHECK: acc.update device_type([[DEVTYPE1]], [[DEVTYPE2]] : i32, i32) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
 
   !$acc update host(a) device_type(*)
-!CHECK: [[DEVTYPE3:%.*]] = arith.constant -1 : index
-!CHECK: acc.update device_type([[DEVTYPE3]] : index) host([[A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: %[[DEVPTR_A:.*]] = acc.getdeviceptr varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) -> !fir.ref<!fir.array<10x10xf32>> {dataClause = 17 : i64, name = "a", structured = false}
+! CHECK: [[DEVTYPE3:%.*]] = arith.constant -1 : index
+! CHECK: acc.update device_type([[DEVTYPE3]] : index) dataOperands(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>){{$}}
+! CHECK: acc.update_host accPtr(%[[DEVPTR_A]] : !fir.ref<!fir.array<10x10xf32>>) bounds(%{{.*}}, %{{.*}}) to varPtr(%[[A]] : !fir.ref<!fir.array<10x10xf32>>) {name = "a", structured = false}
+
 end subroutine acc_update

diff  --git a/flang/test/Lower/OpenACC/locations.f90 b/flang/test/Lower/OpenACC/locations.f90
index 339ef01af9bb2..3af06ab07e34b 100644
--- a/flang/test/Lower/OpenACC/locations.f90
+++ b/flang/test/Lower/OpenACC/locations.f90
@@ -16,16 +16,22 @@ subroutine standalone_data_directive_locations(arr)
     !CHECK-SAME:  loc("{{.*}}locations.f90":14:11)
 
     !$acc update device(arr)
-    !CHECK-LABEL: acc.update device
+    !CHECK-LABEL: acc.update_device varPtr
+    !CHECK-SAME:  loc("{{.*}}locations.f90":18:25)
+    !CHECK-LABEL: acc.update dataOperands
     !CHECK-SAME:  loc("{{.*}}locations.f90":18:11)
 
     !$acc update host(arr)
-    !CHECK-LABEL: acc.update host
-    !CHECK-SAME:  loc("{{.*}}locations.f90":22:11)
+    !CHECK-LABEL: acc.getdeviceptr varPtr
+    !CHECK-SAME:  loc("{{.*}}locations.f90":24:23)
+    !CHECK-LABEL: acc.update dataOperands
+    !CHECK-SAME:  loc("{{.*}}locations.f90":24:11)
+    !CHECK-LABEL: acc.update_host
+    !CHECK-SAME:  loc("{{.*}}locations.f90":24:23)
 
     !$acc exit data delete(arr)
     !CHECK-LABEL: acc.exit_data
-    !CHECK-SAME:  loc("{{.*}}locations.f90":26:11)
+    !CHECK-SAME:  loc("{{.*}}locations.f90":32:11)
 
   end subroutine
 
@@ -46,14 +52,14 @@ subroutine nested_acc_locations(arr1d)
     !CHECK: acc.parallel
     !CHECK: acc.loop
 
-    !CHECK:        acc.yield loc("{{.*}}locations.f90":38:11)
-    !CHECK-NEXT: } loc("{{.*}}locations.f90":38:11)
+    !CHECK:        acc.yield loc("{{.*}}locations.f90":44:11)
+    !CHECK-NEXT: } loc("{{.*}}locations.f90":44:11)
 
-    !CHECK:        acc.yield loc("{{.*}}locations.f90":37:11)
-    !CHECK-NEXT: } loc("{{.*}}locations.f90":37:11)
+    !CHECK:        acc.yield loc("{{.*}}locations.f90":43:11)
+    !CHECK-NEXT: } loc("{{.*}}locations.f90":43:11)
 
-    !CHECK-NEXT:   acc.terminator loc("{{.*}}locations.f90":36:11)
-    !CHECK-NEXT: } loc("{{.*}}locations.f90":36:11)
+    !CHECK-NEXT:   acc.terminator loc("{{.*}}locations.f90":42:11)
+    !CHECK-NEXT: } loc("{{.*}}locations.f90":42:11)
 
   end subroutine
 
@@ -61,11 +67,11 @@ subroutine runtime_directive()
 
     !$acc init
     !CHECK-LABEL: acc.init
-    !CHECK-SAME:  loc("{{.*}}locations.f90":62:11)
+    !CHECK-SAME:  loc("{{.*}}locations.f90":68:11)
 
     !$acc shutdown
     !CHECK-LABEL: acc.shutdown
-    !CHECK-SAME:  loc("{{.*}}locations.f90":66:11)
+    !CHECK-SAME:  loc("{{.*}}locations.f90":72:11)
 
   end subroutine
 
@@ -80,10 +86,10 @@ subroutine combined_directive_locations(arr)
 
     !CHECK: acc.parallel
     !CHECK: acc.loop
-    !CHECK:      acc.yield loc("{{.*}}locations.f90":76:11)
-    !CHECK-NEXT: } loc("{{.*}}locations.f90":76:11)
-    !CHECK:      acc.yield loc("{{.*}}locations.f90":76:11)
-    !CHECK-NEXT: } loc("{{.*}}locations.f90":76:11)
+    !CHECK:      acc.yield loc("{{.*}}locations.f90":82:11)
+    !CHECK-NEXT: } loc("{{.*}}locations.f90":82:11)
+    !CHECK:      acc.yield loc("{{.*}}locations.f90":82:11)
+    !CHECK-NEXT: } loc("{{.*}}locations.f90":82:11)
   end subroutine
 
   subroutine if_clause_expr_location(arr)
@@ -95,14 +101,14 @@ subroutine if_clause_expr_location(arr)
       arr(i) = arr(i) * arr(i)
     end do
 
-    !CHECK: %{{.*}} = arith.constant true loc("{{.*}}locations.f90":93:25)
+    !CHECK: %{{.*}} = arith.constant true loc("{{.*}}locations.f90":99:25)
 
     !CHECK: acc.parallel
     !CHECK: acc.loop
-    !CHECK:      acc.yield loc("{{.*}}locations.f90":93:11)
-    !CHECK-NEXT: } loc("{{.*}}locations.f90":93:11)
-    !CHECK:      acc.yield loc("{{.*}}locations.f90":93:11)
-    !CHECK-NEXT: } loc("{{.*}}locations.f90":93:11)
+    !CHECK:      acc.yield loc("{{.*}}locations.f90":99:11)
+    !CHECK-NEXT: } loc("{{.*}}locations.f90":99:11)
+    !CHECK:      acc.yield loc("{{.*}}locations.f90":99:11)
+    !CHECK-NEXT: } loc("{{.*}}locations.f90":99:11)
   end subroutine
 
 end module

diff  --git a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
index 33c0b74d9db46..35e0ac7632e6c 100644
--- a/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
+++ b/mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
@@ -150,7 +150,8 @@ LogicalResult acc::GetDevicePtrOp::verify() {
   if (getDataClause() != acc::DataClause::acc_getdeviceptr &&
       getDataClause() != acc::DataClause::acc_copyout &&
       getDataClause() != acc::DataClause::acc_delete &&
-      getDataClause() != acc::DataClause::acc_detach)
+      getDataClause() != acc::DataClause::acc_detach &&
+      getDataClause() != acc::DataClause::acc_update_host)
     return emitError("getDevicePtr mismatch");
   return success();
 }


        


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