[Mlir-commits] [mlir] a4d65fe - [mlir][LLVMIR] Support switch without cases

[Alexis Engelke]

Author: Alexis Engelke
Date: 2023-07-28T14:01:54+02:00
New Revision: a4d65fe67f7ce1b2a0dcc89bf6aa4672797cb92c

URL: https://github.com/llvm/llvm-project/commit/a4d65fe67f7ce1b2a0dcc89bf6aa4672797cb92c
DIFF: https://github.com/llvm/llvm-project/commit/a4d65fe67f7ce1b2a0dcc89bf6aa4672797cb92c.diff

LOG: [mlir][LLVMIR] Support switch without cases

LLVM supports switch ops without case values, for which the optional
caseValues has no value (i.e., std::nullopt, no the empty array).
Handle this case properly when translating MLIR-LLVM to LLVM-IR.

Reviewed By: Dinistro, Mogball

Differential Revision: https://reviews.llvm.org/D156431

Added: 
    

Modified: 
    mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
    mlir/test/Target/LLVMIR/llvmir.mlir

Removed: 
    


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diff  --git a/mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
index 8f7c5d8b799e27..e0643ac5361726 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
@@ -308,6 +308,10 @@ convertOperationImpl(Operation &opInst, llvm::IRBuilderBase &builder,
         moduleTranslation.lookupBlock(switchOp.getDefaultDestination()),
         switchOp.getCaseDestinations().size());
 
+    // Handle switch with zero cases.
+    if (!switchOp.getCaseValues())
+      return success();
+
     auto *ty = llvm::cast<llvm::IntegerType>(
         moduleTranslation.convertType(switchOp.getValue().getType()));
     for (auto i :

diff  --git a/mlir/test/Target/LLVMIR/llvmir.mlir b/mlir/test/Target/LLVMIR/llvmir.mlir
index fbe0d30c198d99..e4ffcb31135f09 100644
--- a/mlir/test/Target/LLVMIR/llvmir.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir.mlir
@@ -2024,6 +2024,21 @@ llvm.func @fastmathFlags(%arg0: f32, %arg1 : vector<2xf32>) {
 
 // -----
 
+// CHECK-LABEL: @switch_empty
+llvm.func @switch_empty(%arg0 : i32) -> i32 {
+  // CHECK:      switch i32 %[[SWITCH_arg0:[0-9]+]], label %[[SWITCHDEFAULT_bb1:[0-9]+]] [
+  // CHECK-NEXT: ]
+  llvm.switch %arg0 : i32, ^bb1 [
+  ]
+
+  // CHECK:      [[SWITCHDEFAULT_bb1]]:
+  // CHECK-NEXT:   ret i32 %[[SWITCH_arg0]]
+^bb1:
+  llvm.return %arg0 : i32
+}
+
+// -----
+
 // CHECK-LABEL: @switch_args
 llvm.func @switch_args(%arg0: i32) -> i32 {
   %0 = llvm.mlir.constant(5 : i32) : i32