[Mlir-commits] [mlir] 3e0866b - [mlir][Vector] NFC - Fail gracefully on size mismatch instead of assert

Nicolas Vasilache llvmlistbot at llvm.org
Tue Feb 14 16:52:33 PST 2023


Author: Nicolas Vasilache
Date: 2023-02-14T16:49:41-08:00
New Revision: 3e0866bf616bf7b293cec93d06d030dd11d7911f

URL: https://github.com/llvm/llvm-project/commit/3e0866bf616bf7b293cec93d06d030dd11d7911f
DIFF: https://github.com/llvm/llvm-project/commit/3e0866bf616bf7b293cec93d06d030dd11d7911f.diff

LOG: [mlir][Vector] NFC - Fail gracefully on size mismatch instead of assert

Added: 
    

Modified: 
    mlir/lib/Dialect/Vector/IR/VectorOps.cpp

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
index 8073757a3042c..02cee8c136557 100644
--- a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
+++ b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp
@@ -4295,6 +4295,11 @@ struct SwapExtractSliceOfTransferWrite
     }
 
     // Fail if tensor::ExtractSliceOp and tensor::InsertSliceOp sizes 
diff er.
+    if (insertOp.getMixedSizes().size() != extractOp.getMixedSizes().size()) {
+      return rewriter.notifyMatchFailure(
+          insertOp, "InsertSliceOp and ExtractSliceOp ranks 
diff er");
+    }
+
     for (auto [insertSize, extractSize] :
          llvm::zip_equal(insertOp.getMixedSizes(), extractOp.getMixedSizes())) {
       if (!isEqualConstantIntOrValue(insertSize, extractSize)) {
@@ -5343,8 +5348,8 @@ void MaskOp::build(
 }
 
 void MaskOp::build(
-    OpBuilder &builder, OperationState &result, TypeRange resultTypes, Value mask,
-    Value passthru, Operation *maskableOp,
+    OpBuilder &builder, OperationState &result, TypeRange resultTypes,
+    Value mask, Value passthru, Operation *maskableOp,
     function_ref<void(OpBuilder &, Operation *)> maskRegionBuilder) {
   build(builder, result, mask, maskableOp, maskRegionBuilder);
   if (passthru)


        


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