[Mlir-commits] [mlir] [mlir][ArmSME] Add rudimentary support for tile spills to the stack (PR #76086)

[Andrzej Warzyński]

https://github.com/banach-space commented:

Great work! Mostly makes sense, but I have a few small questions/suggestions.

>From summary:

> Here the in-memory tile op:
> 
> arm_sme.tile_op { tile_id = <IN MEMORY TILE> }

Could you clarify what "IN MEMORY TILE" is in practice? IIUC, it's an integer >= 16?

> This could be optimized to only spill/load data the tile op will use, which could be just a slice.

Could you add a test that demonstrates excessive spilling?

> It's also not making any use of liveness, which could allow reusing tiles. But these is not seen as important as correct code should only use the available number of tiles.

Please document these as next steps for optimisation. In particular, this is important, but we may not have the bandwidth to prioritise this just yet. Functional correctness first, performance next ;-)

https://github.com/llvm/llvm-project/pull/76086