[Mlir-commits] [mlir] [mlir][vector] Deal with special patterns when emulating masked load/store (PR #75587)

[Hsiangkai Wang]

Hsiangkai wrote:

> > In this patch, the special case is continuous 1s, then continuous 0s, e.g., [1, 1, 1, ..., 0, 0].
> 
> I would expect these to fold to constants:
> 
> ```mlir
>   %0 = vector.constant_mask [2] : vector<4xi1>
>   %1 = vector.extract %0[0] : i1 from vector<4xi1>
> ```
> 
> Instead of working around this in the `VectorMaskedLoadOpConverter`/`VectorMaskedStoreOpConverter`, can we add the missing folds, or am I missing something here?

Even we add the missing constant folds, use vector.load + vector.insert_strided_slice is more efficient than multiple scalar memref.load, isn't it?

https://github.com/llvm/llvm-project/pull/75587