[Mlir-commits] [mlir] [mlir][vector] Deal with special patterns when emulating masked load/store (PR #75587)

[Hsiangkai Wang]

Hsiangkai wrote:

In this patch, the special case is continuous 1s, then continuous 0s, e.g., [1, 1, 1, ..., 0, 0].

https://github.com/llvm/llvm-project/pull/75587