[Mlir-commits] [mlir] [mlir][vector] Add pattern to break down reductions into arith ops (PR #75727)

Andrzej WarzyƄski llvmlistbot at llvm.org
Mon Dec 18 10:54:14 PST 2023


================
@@ -1578,6 +1580,50 @@ struct ReduceRedundantZero final : OpRewritePattern<vector::ReductionOp> {
   }
 };
 
----------------
banach-space wrote:

Could you document this pattern with an example?

https://github.com/llvm/llvm-project/pull/75727


More information about the Mlir-commits mailing list