[Mlir-commits] [mlir] [mlir][sparse] support sparsifying 2:4 block sparsity (PR #71749)

[Aart Bik]

aartbik wrote:

Thanks for your interest in this work!

We have an end-to-end flow that maps linalg.matmul to 2:4 using our "CUDA libgen" path, i.e. we change the code into a call into the cusparseLt library for 2:4 operations. We do have a sample example that uses gpu dialect to actually map to the mma instruction (through nvgpu.mma.sp.sync), but that is not part of any codegen... yet!

See https://discourse.llvm.org/t/sparse-compiler-and-gpu-code-generation/69786/ for a more in-depth discussions of what I wrote above.

https://github.com/llvm/llvm-project/pull/71749