[Mlir-commits] [mlir] [mlir][sparse] optimize memory load to SSA value when generating spar… (PR #74750)
Yinying Li
llvmlistbot at llvm.org
Thu Dec 7 11:28:08 PST 2023
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@@ -1924,12 +1916,13 @@ void LoopEmitter::genResolvedSliceBegin(OpBuilder &builder, Location loc,
pHi = genIndexLoad(builder, loc, positionsBuffers[tid][lvl],
ADDI(posits[tid][lvl - 1], c1));
}
- // Fills out pIdxBuffer[tid][lvl][0] with [/*memSize =*/4, 0, pLo, pHi]
- updateSlicePosTupleNum(builder, loc, c1, sPtrBuf);
+ // Fills out pIdxBuffer[tid][lvl][0] with [0, pLo, pHi]
updateSlicePosPtr(builder, loc, sPtrBuf, c0);
updateSlicePos(builder, loc, sPtrBuf, pLo, c0, SlicePosKind::kLo);
updateSlicePos(builder, loc, sPtrBuf, pHi, c0, SlicePosKind::kHi);
-
+ // Slice over a resolved parent, we only need one pair of pos hi and lo to
+ // specified the current slice.
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yinying-lisa-li wrote:
specify
https://github.com/llvm/llvm-project/pull/74750
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