[Mlir-commits] [mlir] [mlir][gpu] Add lowering dynamic_shared_memory op for rocdl (PR #74473)

[Guray Ozen]

grypp wrote:

I'm unsure about how dynamic workgroup memory functions for the ROCDL target. I assumed it operates similarly to CUDA. If this isn't accurate, I'm open to splitting the test code for NVVM target.

The objective of this PR and #74475 is to utilize the `gpu.dynamic_shared_memory` OP with `vector.load`, like below:

```
gpu.func @dynamic_shmem_with_vector(%arg1: memref<1xf32>) {
%0 = arith.constant 0 : index
%1 = gpu.dynamic_shared_memory : memref<?xi8, #gpu.address_space<workgroup>>
%2 = memref.view %1[%0][] : memref<?xi8, #gpu.address_space<workgroup>> to memref<1xf32, #gpu.address_space<workgroup>>
%3 = vector.load %2[%0] : memref<1xf32, #gpu.address_space<workgroup>>, vector<1xf32>
vector.store %3, %arg1[%0] : memref<1xf32>, vector<1xf32>
...
```


https://github.com/llvm/llvm-project/pull/74473