[Mlir-commits] [mlir] [mlir][linalg] Fix a DCE crash with memref<0x..> and the op has uses (PR #73908)

Nicolas Vasilache llvmlistbot at llvm.org
Mon Dec 4 21:52:46 PST 2023


================
@@ -47,6 +47,31 @@ func.func @dce_zero_memref(%arg0 : memref<0xf32>, %arg1: tensor<0xf32>) -> tenso
 
 // -----
 
+#accesses = [
+  affine_map<(i) -> (i)>,
+  affine_map<(i) -> (i)>
+]
+
+#trait = {
+  indexing_maps = #accesses,
+  iterator_types = ["parallel"]
+}
+
+func.func @no_dce_zero_memref(%arg0 : memref<0xf32>, %arg1: tensor<0xf32>) -> tensor<0xf32> {
+  // memref<0xf32> cannot be dce'ed
+  %2 = linalg.generic #trait ins(%arg0: memref<0xf32>) outs(%arg1 : tensor<0xf32>) {
----------------
nicolasvasilache wrote:

hmm I thought we had tightened the op semantics to not have mixed memref/tensor anymore.
I would have expected a verification error here.

https://github.com/llvm/llvm-project/pull/73908


More information about the Mlir-commits mailing list