[Mlir-commits] [mlir] 3f7f1bc - [mlir] Update AArch64 integration tests to use mlir-cpu-runner
Andrzej Warzynski
llvmlistbot at llvm.org
Thu Aug 24 02:44:48 PDT 2023
Author: Andrzej Warzynski
Date: 2023-08-24T09:44:11Z
New Revision: 3f7f1bca38429092fd535c25859f3e6dc0d3fb1a
URL: https://github.com/llvm/llvm-project/commit/3f7f1bca38429092fd535c25859f3e6dc0d3fb1a
DIFF: https://github.com/llvm/llvm-project/commit/3f7f1bca38429092fd535c25859f3e6dc0d3fb1a.diff
LOG: [mlir] Update AArch64 integration tests to use mlir-cpu-runner
For consistency with other tests and to simplify the `RUN` lines, switch
to using `mlir-cpu-runner` instead of `lli` in integrations tests
targeting SSVE and SME.
Differential Revision: https://reviews.llvm.org/D158719
Added:
Modified:
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
Removed:
################################################################################
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
index 116bf9ffe5e724..f283ed31fe58ed 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/test-ssve.mlir
@@ -1,13 +1,15 @@
-// RUN: mlir-opt %s -test-lower-to-llvm | \
-// RUN: mlir-translate -mlir-to-llvmir | \
-// RUN: %lli_aarch64_cmd --march=aarch64 --mattr="+sve,+sme" \
-// RUN: -force-streaming-compatible-sve \
-// RUN: --entry-function=entry \
-// RUN: --dlopen=%mlir_native_utils_lib_dir/libmlir_c_runner_utils%shlibext | \
-// RUN: FileCheck %s
+// DEFINE: %{entry_point} = entry
+// DEFINE: %{compile} = mlir-opt %s -test-lower-to-llvm
+// DEFINE: %{run} = %mcr_aarch64_cmd \
+// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: --force-streaming-compatible-sve \
+// DEFINE: -e %{entry_point} -entry-point-result=i32 \
+// DEFINE: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils
// NOTE: To run this test, your CPU must support SME.
+// RUN: %{compile} | %{run} | FileCheck %s
+
// VLA memcopy in streaming mode.
func.func @streaming_kernel_copy(%src : memref<?xi64>, %dst : memref<?xi64>, %size : index) attributes {arm_streaming} {
%c0 = arith.constant 0 : index
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
index feec548d8de4fe..455405d923bd66 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/ArmSME/vector-ops.mlir
@@ -1,12 +1,14 @@
-// RUN: mlir-opt %s -enable-arm-streaming="mode=locally enable-za" \
-// RUN: -convert-vector-to-arm-sme -convert-arm-sme-to-scf \
-// RUN: -convert-vector-to-llvm="enable-arm-sme" \
-// RUN: -allocate-arm-sme-tiles -test-lower-to-llvm | \
-// RUN: mlir-translate -mlir-to-llvmir | \
-// RUN: %lli_aarch64_cmd --march=aarch64 --mattr="+sve,+sme" \
-// RUN: --entry-function=entry \
-// RUN: --dlopen=%mlir_native_utils_lib_dir/libmlir_c_runner_utils%shlibext | \
-// RUN: FileCheck %s
+// DEFINE: %{entry_point} = entry
+// DEFINE: %{compile} = mlir-opt %s -enable-arm-streaming="mode=locally enable-za" \
+// DEFINE: -convert-vector-to-arm-sme -convert-arm-sme-to-scf \
+// DEFINE: -convert-vector-to-llvm="enable-arm-sme" \
+// DEFINE: -allocate-arm-sme-tiles -test-lower-to-llvm
+// DEFINE: %{run} = %mcr_aarch64_cmd \
+// DEFINE: -march=aarch64 -mattr=+sve,+sme \
+// DEFINE: -e %{entry_point} -entry-point-result=i32 \
+// DEFINE: -shared-libs=%mlir_runner_utils,%mlir_c_runner_utils
+
+// RUN: %{compile} | %{run} | FileCheck %s
func.func @entry() -> i32 {
%c0 = arith.constant 0 : index
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