[Mlir-commits] [mlir] 3185031 - [mlir][ArmSME] Remove "pure" side-effect from 'get_tile_id' op to prevent CSE
Cullen Rhodes
llvmlistbot at llvm.org
Tue Aug 1 01:11:49 PDT 2023
Author: Cullen Rhodes
Date: 2023-08-01T08:09:22Z
New Revision: 31850318f7788bc923909153614fa072d02c7aed
URL: https://github.com/llvm/llvm-project/commit/31850318f7788bc923909153614fa072d02c7aed
DIFF: https://github.com/llvm/llvm-project/commit/31850318f7788bc923909153614fa072d02c7aed.diff
LOG: [mlir][ArmSME] Remove "pure" side-effect from 'get_tile_id' op to prevent CSE
The 'get_tile_id' op is currently marked as pure so CSE thinks these ops
are equivalent and replaces with them a single one. This patch removes
pure to prevent this.
Reviewed By: awarzynski
Differential Revision: https://reviews.llvm.org/D156558
Added:
mlir/test/Dialect/ArmSME/cse.mlir
Modified:
mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td b/mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
index caa6e384bdb2b5..01925d023b7902 100644
--- a/mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
+++ b/mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
@@ -162,7 +162,7 @@ def CastVectorToTile : ArmSME_Op<"cast_vector_to_tile", [Pure, TileElementWidthM
let hasCanonicalizeMethod = 1;
}
-def GetTileID : ArmSME_Op<"get_tile_id", [Pure]> {
+def GetTileID : ArmSME_Op<"get_tile_id"> {
let summary = "Returns an SME \"virtual tile\" id";
let description = [{
A `get_tile_id` operation returns a scalar integer representing an SME
diff --git a/mlir/test/Dialect/ArmSME/cse.mlir b/mlir/test/Dialect/ArmSME/cse.mlir
new file mode 100644
index 00000000000000..734bd9f15c8dea
--- /dev/null
+++ b/mlir/test/Dialect/ArmSME/cse.mlir
@@ -0,0 +1,16 @@
+// RUN: mlir-opt -allow-unregistered-dialect %s -pass-pipeline='builtin.module(func.func(cse))' | FileCheck %s
+
+// This test is checking that CSE does not remove 'arm_sme.get_tile_id' ops as
+// duplicates.
+// CHECK-LABEL: @get_tile_id
+// CHECK: %[[TILE_ID_0:.*]] = arm_sme.get_tile_id : i32
+// CHECK: %[[TILE_ID_1:.*]] = arm_sme.get_tile_id : i32
+// CHECK: "prevent.dce"(%[[TILE_ID_0]]) : (i32) -> ()
+// CHECK: "prevent.dce"(%[[TILE_ID_1]]) : (i32) -> ()
+func.func @get_tile_id() {
+ %tile_id_1 = arm_sme.get_tile_id : i32
+ %tile_id_2 = arm_sme.get_tile_id : i32
+ "prevent.dce"(%tile_id_1) : (i32) -> ()
+ "prevent.dce"(%tile_id_2) : (i32) -> ()
+ return
+}
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