[Mlir-commits] [mlir] 5041fe8 - [mlir][vector] Fix integer promotion type mismatch
Lei Zhang
llvmlistbot at llvm.org
Mon Apr 17 11:29:41 PDT 2023
Author: Lei Zhang
Date: 2023-04-17T11:29:23-07:00
New Revision: 5041fe8439c161e5d9d8f7774f7ca95af46d880e
URL: https://github.com/llvm/llvm-project/commit/5041fe8439c161e5d9d8f7774f7ca95af46d880e
DIFF: https://github.com/llvm/llvm-project/commit/5041fe8439c161e5d9d8f7774f7ca95af46d880e.diff
LOG: [mlir][vector] Fix integer promotion type mismatch
We need to create a new type with transposed shape after
transposing the operand in `CanonicalizeContractMatmulToMMT`.
Reviewed By: kuhar, dcaballe
Differential Revision: https://reviews.llvm.org/D148470
Added:
Modified:
mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
mlir/test/Dialect/Vector/vector-contract-matmul-transforms.mlir
Removed:
################################################################################
diff --git a/mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp b/mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
index ea83242b7fc79..d412b157e2849 100644
--- a/mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
+++ b/mlir/lib/Dialect/Vector/Transforms/VectorTransforms.cpp
@@ -1079,12 +1079,18 @@ struct CanonicalizeContractMatmulToMMT final
if (auto sext = mat.getDefiningOp<arith::ExtSIOp>()) {
Value trans =
rewriter.create<vector::TransposeOp>(loc, sext.getIn(), perm);
- return rewriter.create<arith::ExtSIOp>(loc, mat.getType(), trans);
+ VectorType newType =
+ VectorType::get(cast<VectorType>(trans.getType()).getShape(),
+ cast<VectorType>(mat.getType()).getElementType());
+ return rewriter.create<arith::ExtSIOp>(loc, newType, trans);
}
if (auto zext = mat.getDefiningOp<arith::ExtUIOp>()) {
Value trans =
rewriter.create<vector::TransposeOp>(loc, zext.getIn(), perm);
- return rewriter.create<arith::ExtUIOp>(loc, mat.getType(), trans);
+ VectorType newType =
+ VectorType::get(cast<VectorType>(trans.getType()).getShape(),
+ cast<VectorType>(mat.getType()).getElementType());
+ return rewriter.create<arith::ExtUIOp>(loc, newType, trans);
}
return rewriter.create<vector::TransposeOp>(loc, mat, perm);
};
diff --git a/mlir/test/Dialect/Vector/vector-contract-matmul-transforms.mlir b/mlir/test/Dialect/Vector/vector-contract-matmul-transforms.mlir
index d0be1230b46b3..ac190b4bec3cd 100644
--- a/mlir/test/Dialect/Vector/vector-contract-matmul-transforms.mlir
+++ b/mlir/test/Dialect/Vector/vector-contract-matmul-transforms.mlir
@@ -42,22 +42,22 @@ func.func @matmul_mk_kn_mn_4x4xi32(%arg0: vector<4x4xi32>, %arg1: vector<4x4xi32
return %res : vector<4x4xi32>
}
-// CHECK-LABEL: func.func @matmul_mk_kn_mn_4x4xi8_extsi_i32
-// CHECK-SAME: ([[ARG0:%.+]]: vector<4x4xi8>, [[ARG1:%.+]]: vector<4x4xi8>, [[ARG2:%.+]]: vector<4x4xi32>)
-// CHECK-NEXT: [[LHS:%.+]] = arith.extsi [[ARG0]] : vector<4x4xi8> to vector<4x4xi32>
-// CHECK-NEXT: [[TRANS:%.+]] = vector.transpose [[ARG1]], [1, 0] : vector<4x4xi8> to vector<4x4xi8>
-// CHECK-NEXT: [[RHS:%.+]] = arith.extsi [[TRANS]] : vector<4x4xi8> to vector<4x4xi32>
+// CHECK-LABEL: func.func @matmul_mk_kn_mn_8x16xi8_extsi_i32
+// CHECK-SAME: ([[ARG0:%.+]]: vector<8x4xi8>, [[ARG1:%.+]]: vector<4x16xi8>, [[ARG2:%.+]]: vector<8x16xi32>)
+// CHECK-NEXT: [[LHS:%.+]] = arith.extsi [[ARG0]] : vector<8x4xi8> to vector<8x4xi32>
+// CHECK-NEXT: [[TRANS:%.+]] = vector.transpose [[ARG1]], [1, 0] : vector<4x16xi8> to vector<16x4xi8>
+// CHECK-NEXT: [[RHS:%.+]] = arith.extsi [[TRANS]] : vector<16x4xi8> to vector<16x4xi32>
// CHECK-NEXT: [[RES:%.+]] = vector.contract {{.+}} [[LHS]], [[RHS]], [[ARG2]]
// CHECK-NEXT: return [[RES]]
-func.func @matmul_mk_kn_mn_4x4xi8_extsi_i32(%arg0: vector<4x4xi8>, %arg1: vector<4x4xi8>, %arg2: vector<4x4xi32>) -> vector<4x4xi32> {
- %lhs = arith.extsi %arg0: vector<4x4xi8> to vector<4x4xi32>
- %rhs = arith.extsi %arg1: vector<4x4xi8> to vector<4x4xi32>
+func.func @matmul_mk_kn_mn_8x16xi8_extsi_i32(%arg0: vector<8x4xi8>, %arg1: vector<4x16xi8>, %arg2: vector<8x16xi32>) -> vector<8x16xi32> {
+ %lhs = arith.extsi %arg0: vector<8x4xi8> to vector<8x4xi32>
+ %rhs = arith.extsi %arg1: vector<4x16xi8> to vector<4x16xi32>
%res = vector.contract {indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>,
affine_map<(d0, d1, d2) -> (d2, d1)>,
affine_map<(d0, d1, d2) -> (d0, d1)>],
iterator_types = ["parallel", "parallel", "reduction"],
- kind = #vector.kind<add>} %lhs, %rhs, %arg2 : vector<4x4xi32>, vector<4x4xi32> into vector<4x4xi32>
- return %res : vector<4x4xi32>
+ kind = #vector.kind<add>} %lhs, %rhs, %arg2 : vector<8x4xi32>, vector<4x16xi32> into vector<8x16xi32>
+ return %res : vector<8x16xi32>
}
// Check that non-square shapes are also handled.
@@ -75,22 +75,22 @@ func.func @matmul_mk_kn_mn_4x16xi32(%arg0: vector<4x16xi32>, %arg1: vector<16x4x
return %res : vector<4x4xi32>
}
-// CHECK-LABEL: func.func @matmul_mk_kn_mn_4x4xi8_extui_i32
-// CHECK-SAME: ([[ARG0:%.+]]: vector<4x4xi8>, [[ARG1:%.+]]: vector<4x4xi8>, [[ARG2:%.+]]: vector<4x4xi32>)
-// CHECK-NEXT: [[LHS:%.+]] = arith.extui [[ARG0]] : vector<4x4xi8> to vector<4x4xi32>
-// CHECK-NEXT: [[TRANS:%.+]] = vector.transpose [[ARG1]], [1, 0] : vector<4x4xi8> to vector<4x4xi8>
-// CHECK-NEXT: [[RHS:%.+]] = arith.extui [[TRANS]] : vector<4x4xi8> to vector<4x4xi32>
+// CHECK-LABEL: func.func @matmul_mk_kn_mn_8x16xi8_extui_i32
+// CHECK-SAME: ([[ARG0:%.+]]: vector<8x4xi8>, [[ARG1:%.+]]: vector<4x16xi8>, [[ARG2:%.+]]: vector<8x16xi32>)
+// CHECK-NEXT: [[LHS:%.+]] = arith.extui [[ARG0]] : vector<8x4xi8> to vector<8x4xi32>
+// CHECK-NEXT: [[TRANS:%.+]] = vector.transpose [[ARG1]], [1, 0] : vector<4x16xi8> to vector<16x4xi8>
+// CHECK-NEXT: [[RHS:%.+]] = arith.extui [[TRANS]] : vector<16x4xi8> to vector<16x4xi32>
// CHECK-NEXT: [[RES:%.+]] = vector.contract {{.+}} [[LHS]], [[RHS]], [[ARG2]]
// CHECK-NEXT: return [[RES]]
-func.func @matmul_mk_kn_mn_4x4xi8_extui_i32(%arg0: vector<4x4xi8>, %arg1: vector<4x4xi8>, %arg2: vector<4x4xi32>) -> vector<4x4xi32> {
- %lhs = arith.extui %arg0: vector<4x4xi8> to vector<4x4xi32>
- %rhs = arith.extui %arg1: vector<4x4xi8> to vector<4x4xi32>
+func.func @matmul_mk_kn_mn_8x16xi8_extui_i32(%arg0: vector<8x4xi8>, %arg1: vector<4x16xi8>, %arg2: vector<8x16xi32>) -> vector<8x16xi32> {
+ %lhs = arith.extui %arg0: vector<8x4xi8> to vector<8x4xi32>
+ %rhs = arith.extui %arg1: vector<4x16xi8> to vector<4x16xi32>
%res = vector.contract {indexing_maps = [affine_map<(d0, d1, d2) -> (d0, d2)>,
affine_map<(d0, d1, d2) -> (d2, d1)>,
affine_map<(d0, d1, d2) -> (d0, d1)>],
iterator_types = ["parallel", "parallel", "reduction"],
- kind = #vector.kind<add>} %lhs, %rhs, %arg2 : vector<4x4xi32>, vector<4x4xi32> into vector<4x4xi32>
- return %res : vector<4x4xi32>
+ kind = #vector.kind<add>} %lhs, %rhs, %arg2 : vector<8x4xi32>, vector<4x16xi32> into vector<8x16xi32>
+ return %res : vector<8x16xi32>
}
// CHECK-LABEL: func.func @matmul_km_nk_mn_4x4xi32
@@ -122,23 +122,23 @@ func.func @matmul_km_kn_mn_4x4xi32(%arg0: vector<4x4xi32>, %arg1: vector<4x4xi32
return %res : vector<4x4xi32>
}
-// CHECK-LABEL: func.func @matmul_km_kn_mn_4x4xi8_mixed_ext_i32
-// CHECK-SAME: ([[ARG0:%.+]]: vector<4x4xi8>, [[ARG1:%.+]]: vector<4x4xi8>, [[ARG2:%.+]]: vector<4x4xi32>)
-// CHECK-DAG: [[LHST:%.+]] = vector.transpose [[ARG0]], [1, 0] : vector<4x4xi8> to vector<4x4xi8>
-// CHECK-DAG: [[LHS:%.+]] = arith.extsi [[LHST]] : vector<4x4xi8> to vector<4x4xi32>
-// CHECK-DAG: [[RHST:%.+]] = vector.transpose [[ARG1]], [1, 0] : vector<4x4xi8> to vector<4x4xi8>
-// CHECK-DAG: [[RHS:%.+]] = arith.extui [[RHST]] : vector<4x4xi8> to vector<4x4xi32>
+// CHECK-LABEL: func.func @matmul_km_kn_mn_8x16xi8_mixed_ext_i32
+// CHECK-SAME: ([[ARG0:%.+]]: vector<4x8xi8>, [[ARG1:%.+]]: vector<4x16xi8>, [[ARG2:%.+]]: vector<8x16xi32>)
+// CHECK-DAG: [[LHST:%.+]] = vector.transpose [[ARG0]], [1, 0] : vector<4x8xi8> to vector<8x4xi8>
+// CHECK-DAG: [[LHS:%.+]] = arith.extsi [[LHST]] : vector<8x4xi8> to vector<8x4xi32>
+// CHECK-DAG: [[RHST:%.+]] = vector.transpose [[ARG1]], [1, 0] : vector<4x16xi8> to vector<16x4xi8>
+// CHECK-DAG: [[RHS:%.+]] = arith.extui [[RHST]] : vector<16x4xi8> to vector<16x4xi32>
// CHECK-NEXT: [[RES:%.+]] = vector.contract {{.+}} [[LHS]], [[RHS]], [[ARG2]]
// CHECK-NEXT: return [[RES]]
-func.func @matmul_km_kn_mn_4x4xi8_mixed_ext_i32(%arg0: vector<4x4xi8>, %arg1: vector<4x4xi8>, %arg2: vector<4x4xi32>) -> vector<4x4xi32> {
- %lhs = arith.extsi %arg0 : vector<4x4xi8> to vector<4x4xi32>
- %rhs = arith.extui %arg1 : vector<4x4xi8> to vector<4x4xi32>
+func.func @matmul_km_kn_mn_8x16xi8_mixed_ext_i32(%arg0: vector<4x8xi8>, %arg1: vector<4x16xi8>, %arg2: vector<8x16xi32>) -> vector<8x16xi32> {
+ %lhs = arith.extsi %arg0 : vector<4x8xi8> to vector<4x8xi32>
+ %rhs = arith.extui %arg1 : vector<4x16xi8> to vector<4x16xi32>
%res = vector.contract {indexing_maps = [affine_map<(d0, d1, d2) -> (d2, d0)>,
affine_map<(d0, d1, d2) -> (d2, d1)>,
affine_map<(d0, d1, d2) -> (d0, d1)>],
iterator_types = ["parallel", "parallel", "reduction"],
- kind = #vector.kind<add>} %lhs, %rhs, %arg2 : vector<4x4xi32>, vector<4x4xi32> into vector<4x4xi32>
- return %res : vector<4x4xi32>
+ kind = #vector.kind<add>} %lhs, %rhs, %arg2 : vector<4x8xi32>, vector<4x16xi32> into vector<8x16xi32>
+ return %res : vector<8x16xi32>
}
// CHECK-LABEL: func.func @matmul_mk_nk_nm_4x4xi32
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