[Mlir-commits] [mlir] 4a33c67 - Fix invalid op result access in SparseTensorCodegen
Frederik Gossen
llvmlistbot at llvm.org
Mon Apr 10 09:36:45 PDT 2023
Author: Frederik Gossen
Date: 2023-04-10T12:36:26-04:00
New Revision: 4a33c67995052aae0abff2a9354358c99eb60763
URL: https://github.com/llvm/llvm-project/commit/4a33c67995052aae0abff2a9354358c99eb60763
DIFF: https://github.com/llvm/llvm-project/commit/4a33c67995052aae0abff2a9354358c99eb60763.diff
LOG: Fix invalid op result access in SparseTensorCodegen
This trigges an assertion introduced in https://reviews.llvm.org/D147883
Differential Revision: https://reviews.llvm.org/D147950
Added:
Modified:
mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
Removed:
################################################################################
diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
index b9f75e9ad0054..50b96144a3c80 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorCodegen.cpp
@@ -1418,8 +1418,7 @@ struct SparseNewOpConverter : public OpConversionPattern<NewOp> {
// instead of just accessing the reader's memory directly.
Value dimSizes = genAlloca(rewriter, loc, dimRank, indexTp);
createFuncCall(rewriter, loc, "copySparseTensorReaderDimSizes", {},
- {reader, dimSizes}, EmitCInterface::On)
- .getResult(0);
+ {reader, dimSizes}, EmitCInterface::On);
for (const auto &d : llvm::enumerate(dstTp.getDimShape()))
if (ShapedType::isDynamic(d.value()))
dynSizes.push_back(rewriter.create<memref::LoadOp>(
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