[Mlir-commits] [mlir] 93b7bdc - [mlir] fix formatting in markdown

[Alex Zinenko]

Author: Alex Zinenko
Date: 2022-09-29T14:10:36Z
New Revision: 93b7bdcda7072581ef3f5ceaae8c4f0d549a0845

URL: https://github.com/llvm/llvm-project/commit/93b7bdcda7072581ef3f5ceaae8c4f0d549a0845
DIFF: https://github.com/llvm/llvm-project/commit/93b7bdcda7072581ef3f5ceaae8c4f0d549a0845.diff

LOG: [mlir] fix formatting in markdown

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td

Removed: 
    


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diff  --git a/mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td b/mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
index 7fb74abdc929..114ff3d5bced 100644
--- a/mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
+++ b/mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
@@ -786,8 +786,8 @@ def MapNestedForeachThreadToGpuThreads :
       The operation alters the block size of the given gpu_launch using 
       blockDim argument.
 
-      Return modes:
-      =============
+      #### Return modes:
+      
       This operation ignores non-gpu_launch ops and drops them in the return.
 
       If any scf.foreach_thread with tensors is found, the transform definitely 
@@ -801,8 +801,7 @@ def MapNestedForeachThreadToGpuThreads :
       producing a new SSA value to satisfy chaining and linearity of the IR 
       properties.
 
-      Example:
-      ========
+      #### Example:
 
       ```
       gpu.launch blocks(%bx, %by, %bz) in (%x = %0, %y = %1, %z = %2)