[Mlir-commits] [mlir] 006a752 - [mlir][LLVMIR] Do not create pseudo debug file name using llvm::Instruction

[Min-Yih Hsu]

Author: Min-Yih Hsu
Date: 2022-09-21T09:46:58-07:00
New Revision: 006a752a3c033950eb16db6b63574c309fa43241

URL: https://github.com/llvm/llvm-project/commit/006a752a3c033950eb16db6b63574c309fa43241
DIFF: https://github.com/llvm/llvm-project/commit/006a752a3c033950eb16db6b63574c309fa43241.diff

LOG: [mlir][LLVMIR] Do not create pseudo debug file name using llvm::Instruction

Previously in mlir-translate, if debug info was absent in a
llvm::Instruction, we tried to create one using the name of its defined
value in a textual LLVM IR file as the (pseudo) debug file name.
However, in order to get that name, we need to call out to LLVM's
SlotTracker, which, surprisingly, took a lot of time. Judging from
the usefulness of such pseudo debug file name and the performance penalty
during translation, this patch simply use "imported-bitcode" as the
debug file name in these case. Eliminating the need of using (expensive)
LLVM value numbering.

Differential Revision: https://reviews.llvm.org/D134305

Added: 
    

Modified: 
    mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
    mlir/test/Target/LLVMIR/Import/basic.ll

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp b/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
index 88dc8f7db9d85..be208b2ed9ade 100644
--- a/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
+++ b/mlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
@@ -251,16 +251,9 @@ class Importer {
 
 Location Importer::processDebugLoc(const llvm::DebugLoc &loc,
                                    llvm::Instruction *inst) {
-  if (!loc && inst) {
-    std::string s;
-    llvm::raw_string_ostream os(s);
-    os << "llvm-imported-inst-%";
-    inst->printAsOperand(os, /*PrintType=*/false);
-    return FileLineColLoc::get(context, os.str(), 0, 0);
-  }
-  if (!loc) {
+  if (!loc)
     return unknownLoc;
-  }
+
   // FIXME: Obtain the filename from DILocationInfo.
   return FileLineColLoc::get(context, "imported-bitcode", loc.getLine(),
                              loc.getCol());

diff  --git a/mlir/test/Target/LLVMIR/Import/basic.ll b/mlir/test/Target/LLVMIR/Import/basic.ll
index 113ba62bb4cad..cc8c5e5d463b5 100644
--- a/mlir/test/Target/LLVMIR/Import/basic.ll
+++ b/mlir/test/Target/LLVMIR/Import/basic.ll
@@ -1,4 +1,8 @@
 ; RUN: mlir-translate -import-llvm %s | FileCheck %s
+; RUN: mlir-translate -import-llvm -mlir-print-debuginfo %s | FileCheck %s --check-prefix=CHECK-DBG
+
+; CHECK-DBG: #[[UNKNOWNLOC:.+]] = loc(unknown)
+; CHECK-DBG: #[[ZEROLOC:.+]] = loc("imported-bitcode":0:0)
 
 %struct.t = type {}
 %struct.s = type { %struct.t, i64 }
@@ -129,6 +133,7 @@ define internal spir_func void @spir_func_internal() {
 
 ; FIXME: function attributes.
 ; CHECK-LABEL: llvm.func internal @f1(%arg0: i64) -> i32 attributes {dso_local} {
+; CHECK-DBG: llvm.func internal @f1(%arg0: i64 loc(unknown)) -> i32 attributes {dso_local} {
 ; CHECK-DAG: %[[c2:[0-9]+]] = llvm.mlir.constant(2 : i32) : i32
 ; CHECK-DAG: %[[c42:[0-9]+]] = llvm.mlir.constant(42 : i32) : i32
 ; CHECK-DAG: %[[c1:[0-9]+]] = llvm.mlir.constant(true) : i1
@@ -137,6 +142,7 @@ define internal dso_local i32 @f1(i64 %a) norecurse {
 entry:
 ; CHECK: %{{[0-9]+}} = llvm.inttoptr %arg0 : i64 to !llvm.ptr<i64>
   %aa = inttoptr i64 %a to i64*
+; CHECK-DBG: llvm.mlir.addressof @g2 : !llvm.ptr<f64> loc(#[[UNKNOWNLOC]])
 ; %[[addrof:[0-9]+]] = llvm.mlir.addressof @g2 : !llvm.ptr<f64>
 ; %[[addrof2:[0-9]+]] = llvm.mlir.addressof @g2 : !llvm.ptr<f64>
 ; %{{[0-9]+}} = llvm.inttoptr %arg0 : i64 to !llvm.ptr<i64>
@@ -145,6 +151,7 @@ entry:
   %bb = ptrtoint double* @g2 to i64
   %cc = getelementptr double, double* @g2, i32 2
 ; CHECK: %[[b:[0-9]+]] = llvm.trunc %arg0 : i64 to i32
+; CHECK-DBG: llvm.trunc %arg0 : i64 to i32 loc(#[[ZEROLOC]])
   %b = trunc i64 %a to i32
 ; CHECK: %[[c:[0-9]+]] = llvm.call @fe(%[[b]]) : (i32) -> f32
   %c = call float @fe(i32 %b)
@@ -168,6 +175,7 @@ if.end:
 ; CHECK: llvm.return %[[c43]]
   ret i32 43
 }
+; CHECK-DBG: } loc(#[[UNKNOWNLOC]])
 
 ; Test that instructions that dominate can be out of sequential order.
 ; CHECK-LABEL: llvm.func @f2(%arg0: i64) -> i64 {