[Mlir-commits] [mlir] dc63ca7 - [mlir][sparse] Fix build warning (NFC)

[Jeff Niu]

Author: Jeff Niu
Date: 2022-10-21T13:13:07-07:00
New Revision: dc63ca78f740b61c92f918fbb172ecf632f7e8a4

URL: https://github.com/llvm/llvm-project/commit/dc63ca78f740b61c92f918fbb172ecf632f7e8a4
DIFF: https://github.com/llvm/llvm-project/commit/dc63ca78f740b61c92f918fbb172ecf632f7e8a4.diff

LOG: [mlir][sparse] Fix build warning (NFC)

Added: 
    

Modified: 
    mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
index b793495489db..22282caa8f2f 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
@@ -626,7 +626,7 @@ struct OutRewriter : public OpRewritePattern<OutOp> {
     // the buffer.
     SmallVector<Value, 4> dims;
     sizesForTensor(rewriter, dims, loc, srcTp, src);
-    for (int64_t i = 0; i < rank; i++) {
+    for (uint64_t i = 0; i < rank; i++) {
       rewriter.create<memref::StoreOp>(loc, dims[i], dimSizes,
                                        constantIndex(rewriter, loc, i));
     }
@@ -650,7 +650,7 @@ struct OutRewriter : public OpRewritePattern<OutOp> {
     // For each element in the source tensor, output the element.
     rewriter.create<ForeachOp>(
         loc, src, [&](OpBuilder &builder, Location loc, ValueRange args) {
-          for (int64_t i = 0; i < rank; i++) {
+          for (uint64_t i = 0; i < rank; i++) {
             rewriter.create<memref::StoreOp>(loc, args[i], indices,
                                              constantIndex(builder, loc, i));
           }