[Mlir-commits] [mlir] 2d9d805 - [mlir][sparse] fix memory leak in test cases

[Peiming Liu]

Author: Peiming Liu
Date: 2022-11-14T23:03:46Z
New Revision: 2d9d805c74fcde1906c7ad1d949f5136e777c0f3

URL: https://github.com/llvm/llvm-project/commit/2d9d805c74fcde1906c7ad1d949f5136e777c0f3
DIFF: https://github.com/llvm/llvm-project/commit/2d9d805c74fcde1906c7ad1d949f5136e777c0f3.diff

LOG: [mlir][sparse] fix memory leak in test cases

Reviewed By: aartbik

Differential Revision: https://reviews.llvm.org/D137985

Added: 
    

Modified: 
    mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir

Removed: 
    


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diff  --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir
index 0124ffc1b8042..c6ebd2f516d15 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_codegen_foreach.mlir
@@ -251,6 +251,7 @@ module {
     bufferization.dealloc_tensor %s3 : tensor<2x2xf64, #DCSC>
     bufferization.dealloc_tensor %s4 : tensor<2x2xf64, #SortedCOO>
     bufferization.dealloc_tensor %s5 : tensor<2x2xf64, #SortedCOOPerm>
+    bufferization.dealloc_tensor %s6 : tensor<7x8x9xf64, #CCCPerm>
 
     return
   }