[Mlir-commits] [mlir] 8c33639 - [mlir] Move the assertion to a valid place.

[Hanhan Wang]

Author: Hanhan Wang
Date: 2022-11-04T12:14:15-07:00
New Revision: 8c33639aa65d0771472abb28718f178d0ffa923d

URL: https://github.com/llvm/llvm-project/commit/8c33639aa65d0771472abb28718f178d0ffa923d
DIFF: https://github.com/llvm/llvm-project/commit/8c33639aa65d0771472abb28718f178d0ffa923d.diff

LOG: [mlir] Move the assertion to a valid place.

The defining Op may live in an unlinked block so its parent Op may be
null. Only assert it when the parent Op is not null.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D137306

Added: 
    

Modified: 
    mlir/lib/Analysis/SliceAnalysis.cpp

Removed: 
    


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diff  --git a/mlir/lib/Analysis/SliceAnalysis.cpp b/mlir/lib/Analysis/SliceAnalysis.cpp
index e343c47bb0f01..4684ccfa21b8a 100644
--- a/mlir/lib/Analysis/SliceAnalysis.cpp
+++ b/mlir/lib/Analysis/SliceAnalysis.cpp
@@ -98,10 +98,11 @@ static void getBackwardSliceImpl(Operation *op,
       // TODO: determine whether we want to recurse backward into the other
       // blocks of parentOp, which are not technically backward unless they flow
       // into us. For now, just bail.
-      assert(parentOp->getNumRegions() == 1 &&
-             parentOp->getRegion(0).getBlocks().size() == 1);
-      if (backwardSlice->count(parentOp) == 0)
+      if (parentOp && backwardSlice->count(parentOp) == 0) {
+        assert(parentOp->getNumRegions() == 1 &&
+               parentOp->getRegion(0).getBlocks().size() == 1);
         getBackwardSliceImpl(parentOp, backwardSlice, filter);
+      }
     } else {
       llvm_unreachable("No definingOp and not a block argument.");
     }