[Mlir-commits] [mlir] 3e724e5 - [mlir][sparse] Fix windows build.
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Tue Nov 1 17:00:08 PDT 2022
Author: bixia1
Date: 2022-11-01T17:00:02-07:00
New Revision: 3e724e529ba14821d2a66218700e44fcd7dc3b64
URL: https://github.com/llvm/llvm-project/commit/3e724e529ba14821d2a66218700e44fcd7dc3b64
DIFF: https://github.com/llvm/llvm-project/commit/3e724e529ba14821d2a66218700e44fcd7dc3b64.diff
LOG: [mlir][sparse] Fix windows build.
Reviewed By: aartbik
Differential Revision: https://reviews.llvm.org/D137210
Added:
Modified:
mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
Removed:
################################################################################
diff --git a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
index a0519462dd8c..9c002f1ae0ec 100644
--- a/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
+++ b/mlir/lib/Dialect/SparseTensor/Transforms/SparseTensorRewriting.cpp
@@ -618,7 +618,7 @@ struct ConvertRewriter : public OpRewritePattern<ConvertOp> {
uint64_t rank = dstTp.getRank();
// Gather the indices-arrays in the dst tensor storage order.
SmallVector<Value, 4> xs(rank, Value());
- for (int64_t i = 0; i < rank; i++) {
+ for (uint64_t i = 0; i < rank; i++) {
uint64_t orgDim = toOrigDim(encSrc, i);
xs[toStoredDim(encDst, orgDim)] = rewriter.create<ToIndicesOp>(
loc, indTp, src, rewriter.getIndexAttr(orgDim));
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