[Mlir-commits] [mlir] f8fb2af - [mlir][spirv] Fix spv.GLSL.{S|U}Clamp type checking

Lei Zhang llvmlistbot at llvm.org
Tue Mar 8 12:57:56 PST 2022


Author: Lei Zhang
Date: 2022-03-08T15:56:37-05:00
New Revision: f8fb2aff70621c0d5ac9dfcc8c48bdd869058f86

URL: https://github.com/llvm/llvm-project/commit/f8fb2aff70621c0d5ac9dfcc8c48bdd869058f86
DIFF: https://github.com/llvm/llvm-project/commit/f8fb2aff70621c0d5ac9dfcc8c48bdd869058f86.diff

LOG: [mlir][spirv] Fix spv.GLSL.{S|U}Clamp type checking

It's fine to use any integer (vector) values regardless of the
signedness. The opcode decides how to interpret the bits.

Reviewed By: hanchung

Differential Revision: https://reviews.llvm.org/D121238

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td
    mlir/test/Dialect/SPIRV/IR/glsl-ops.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td
index dbfcc727b05a9..5c7e22fb33d7e 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVGLSLOps.td
@@ -979,7 +979,7 @@ def SPV_GLSLFClampOp : SPV_GLSLTernaryArithmeticOp<"FClamp", 43, SPV_Float> {
 
 // -----
 
-def SPV_GLSLUClampOp : SPV_GLSLTernaryArithmeticOp<"UClamp", 44, SPV_SignlessOrUnsignedInt> {
+def SPV_GLSLUClampOp : SPV_GLSLTernaryArithmeticOp<"UClamp", 44, SPV_Integer> {
   let summary = "Clamp x between min and max values.";
 
   let description = [{
@@ -1008,7 +1008,7 @@ def SPV_GLSLUClampOp : SPV_GLSLTernaryArithmeticOp<"UClamp", 44, SPV_SignlessOrU
 
 // -----
 
-def SPV_GLSLSClampOp : SPV_GLSLTernaryArithmeticOp<"SClamp", 45, SPV_SignedInt> {
+def SPV_GLSLSClampOp : SPV_GLSLTernaryArithmeticOp<"SClamp", 45, SPV_Integer> {
   let summary = "Clamp x between min and max values.";
 
   let description = [{

diff  --git a/mlir/test/Dialect/SPIRV/IR/glsl-ops.mlir b/mlir/test/Dialect/SPIRV/IR/glsl-ops.mlir
index 78997114a0e40..4b0b8c17d7310 100644
--- a/mlir/test/Dialect/SPIRV/IR/glsl-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/glsl-ops.mlir
@@ -314,7 +314,7 @@ func @fclamp(%arg0 : vector<3xf32>, %min : vector<3xf32>, %max : vector<3xf32>)
 // spv.GLSL.UClamp
 //===----------------------------------------------------------------------===//
 
-func @fclamp(%arg0 : ui32, %min : ui32, %max : ui32) -> () {
+func @uclamp(%arg0 : ui32, %min : ui32, %max : ui32) -> () {
   // CHECK: spv.GLSL.UClamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : ui32
   %2 = spv.GLSL.UClamp %arg0, %min, %max : ui32
   return
@@ -322,7 +322,7 @@ func @fclamp(%arg0 : ui32, %min : ui32, %max : ui32) -> () {
 
 // -----
 
-func @fclamp(%arg0 : vector<4xi32>, %min : vector<4xi32>, %max : vector<4xi32>) -> () {
+func @uclamp(%arg0 : vector<4xi32>, %min : vector<4xi32>, %max : vector<4xi32>) -> () {
   // CHECK: spv.GLSL.UClamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : vector<4xi32>
   %2 = spv.GLSL.UClamp %arg0, %min, %max : vector<4xi32>
   return
@@ -330,8 +330,8 @@ func @fclamp(%arg0 : vector<4xi32>, %min : vector<4xi32>, %max : vector<4xi32>)
 
 // -----
 
-func @fclamp(%arg0 : si32, %min : si32, %max : si32) -> () {
-  // expected-error @+1 {{must be 8/16/32/64-bit signless/unsigned integer or vector}}
+func @uclamp(%arg0 : si32, %min : si32, %max : si32) -> () {
+  // CHECK: spv.GLSL.UClamp
   %2 = spv.GLSL.UClamp %arg0, %min, %max : si32
   return
 }
@@ -342,7 +342,7 @@ func @fclamp(%arg0 : si32, %min : si32, %max : si32) -> () {
 // spv.GLSL.SClamp
 //===----------------------------------------------------------------------===//
 
-func @fclamp(%arg0 : si32, %min : si32, %max : si32) -> () {
+func @sclamp(%arg0 : si32, %min : si32, %max : si32) -> () {
   // CHECK: spv.GLSL.SClamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : si32
   %2 = spv.GLSL.SClamp %arg0, %min, %max : si32
   return
@@ -350,7 +350,7 @@ func @fclamp(%arg0 : si32, %min : si32, %max : si32) -> () {
 
 // -----
 
-func @fclamp(%arg0 : vector<4xsi32>, %min : vector<4xsi32>, %max : vector<4xsi32>) -> () {
+func @sclamp(%arg0 : vector<4xsi32>, %min : vector<4xsi32>, %max : vector<4xsi32>) -> () {
   // CHECK: spv.GLSL.SClamp {{%[^,]*}}, {{%[^,]*}}, {{%[^,]*}} : vector<4xsi32>
   %2 = spv.GLSL.SClamp %arg0, %min, %max : vector<4xsi32>
   return
@@ -358,8 +358,8 @@ func @fclamp(%arg0 : vector<4xsi32>, %min : vector<4xsi32>, %max : vector<4xsi32
 
 // -----
 
-func @fclamp(%arg0 : i32, %min : i32, %max : i32) -> () {
-  // expected-error @+1 {{must be 8/16/32/64-bit signed integer or vector}}
+func @sclamp(%arg0 : i32, %min : i32, %max : i32) -> () {
+  // CHECK: spv.GLSL.SClamp
   %2 = spv.GLSL.SClamp %arg0, %min, %max : i32
   return
 }


        


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