[Mlir-commits] [mlir] 829c84e - [mlir][nvgpu] fix MSVC warning regarding left shift

Christopher Bate llvmlistbot at llvm.org
Fri Jun 17 15:30:31 PDT 2022


Author: Christopher Bate
Date: 2022-06-17T16:26:40-06:00
New Revision: 829c84ec5b8b08d97952b5f371291e95ec5fee43

URL: https://github.com/llvm/llvm-project/commit/829c84ec5b8b08d97952b5f371291e95ec5fee43
DIFF: https://github.com/llvm/llvm-project/commit/829c84ec5b8b08d97952b5f371291e95ec5fee43.diff

LOG: [mlir][nvgpu] fix MSVC warning regarding left shift

Differential Revision: https://reviews.llvm.org/D128088

Added: 
    

Modified: 
    mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp

Removed: 
    


################################################################################
diff  --git a/mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp b/mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp
index 23d8c79a25183..3d01e2ee0998e 100644
--- a/mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp
+++ b/mlir/lib/Dialect/NVGPU/Transforms/OptimizeSharedMemory.cpp
@@ -64,7 +64,7 @@ static Value permuteVectorOffset(OpBuilder &b, Location loc,
   int64_t M = llvm::Log2_64(memrefTy.getDimSize(tgtDim));
 
   // Capture bits[0:(M-N)] of src by first creating a (M-N) mask.
-  int64_t mask = (1 << (M - N)) - 1;
+  int64_t mask = (1LL << (M - N)) - 1;
   if (permuteEveryN > 1)
     mask = mask << llvm::Log2_64(permuteEveryN);
   Value srcBits = b.create<arith::ConstantIndexOp>(loc, mask);
@@ -191,7 +191,7 @@ mlir::nvgpu::optimizeSharedMemoryReadsAndWrites(Operation *parentOp,
       (8 * kSharedMemoryLineSizeBytes / memRefType.getElementTypeBitWidth()) /
       rowSize;
   const int64_t threadGroupSize =
-      1 << (7 - llvm::Log2_64(kDefaultVectorSizeBits / 8));
+      1LL << (7 - llvm::Log2_64(kDefaultVectorSizeBits / 8));
   if (rowsPerLine >= threadGroupSize)
     return failure();
 


        


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