[Mlir-commits] [mlir] 719e24d - [mlir][LLVMIR] Use isScalableVectorType in ShuffleVectorOp::parse
Min-Yih Hsu
llvmlistbot at llvm.org
Wed Jun 15 14:33:58 PDT 2022
Author: Min-Yih Hsu
Date: 2022-06-15T14:33:48-07:00
New Revision: 719e24d39fad43e5d1f692ff72c1a2a40687b297
URL: https://github.com/llvm/llvm-project/commit/719e24d39fad43e5d1f692ff72c1a2a40687b297
DIFF: https://github.com/llvm/llvm-project/commit/719e24d39fad43e5d1f692ff72c1a2a40687b297.diff
LOG: [mlir][LLVMIR] Use isScalableVectorType in ShuffleVectorOp::parse
Instead of casting the incoming operand into VectorType to check if it's
scalable or not.
This is the place I missed to fix in f088b99eac74.
Differential Revision: https://reviews.llvm.org/D127535
Added:
Modified:
mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
mlir/test/Dialect/LLVMIR/roundtrip.mlir
Removed:
################################################################################
diff --git a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
index 164e966d1e1d4..b972c1fda3dbb 100644
--- a/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
+++ b/mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
@@ -2087,7 +2087,7 @@ ParseResult ShuffleVectorOp::parse(OpAsmParser &parser,
loc, "expected LLVM IR dialect vector type for operand #1");
auto vType =
LLVM::getVectorType(LLVM::getVectorElementType(typeV1), maskAttr.size(),
- typeV1.cast<VectorType>().isScalable());
+ LLVM::isScalableVectorType(typeV1));
result.addTypes(vType);
return success();
}
diff --git a/mlir/test/Dialect/LLVMIR/roundtrip.mlir b/mlir/test/Dialect/LLVMIR/roundtrip.mlir
index 97d093f6ef897..f18972caaf0a0 100644
--- a/mlir/test/Dialect/LLVMIR/roundtrip.mlir
+++ b/mlir/test/Dialect/LLVMIR/roundtrip.mlir
@@ -272,15 +272,17 @@ func.func @casts(%arg0: i32, %arg1: i64, %arg2: vector<4xi32>,
}
// CHECK-LABEL: @vect
-func.func @vect(%arg0: vector<4xf32>, %arg1: i32, %arg2: f32) {
+func.func @vect(%arg0: vector<4xf32>, %arg1: i32, %arg2: f32, %arg3: !llvm.vec<2 x ptr<i32>>) {
// CHECK: = llvm.extractelement {{.*}} : vector<4xf32>
%0 = llvm.extractelement %arg0[%arg1 : i32] : vector<4xf32>
// CHECK: = llvm.insertelement {{.*}} : vector<4xf32>
%1 = llvm.insertelement %arg2, %arg0[%arg1 : i32] : vector<4xf32>
// CHECK: = llvm.shufflevector {{.*}} [0 : i32, 0 : i32, 0 : i32, 0 : i32, 7 : i32] : vector<4xf32>, vector<4xf32>
%2 = llvm.shufflevector %arg0, %arg0 [0 : i32, 0 : i32, 0 : i32, 0 : i32, 7 : i32] : vector<4xf32>, vector<4xf32>
+// CHECK: = llvm.shufflevector %{{.+}}, %{{.+}} [1 : i32, 0 : i32] : !llvm.vec<2 x ptr<i32>>, !llvm.vec<2 x ptr<i32>>
+ %3 = llvm.shufflevector %arg3, %arg3 [1 : i32, 0 : i32] : !llvm.vec<2 x ptr<i32>>, !llvm.vec<2 x ptr<i32>>
// CHECK: = llvm.mlir.constant(dense<1.000000e+00> : vector<4xf32>) : vector<4xf32>
- %3 = llvm.mlir.constant(dense<1.0> : vector<4xf32>) : vector<4xf32>
+ %4 = llvm.mlir.constant(dense<1.0> : vector<4xf32>) : vector<4xf32>
return
}
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