[Mlir-commits] [mlir] 9b3712e - [MLIR][LLVMIR] Add round intrinsic

lorenzo chelini llvmlistbot at llvm.org
Tue Jun 7 01:28:02 PDT 2022


Author: lorenzo chelini
Date: 2022-06-07T10:27:55+02:00
New Revision: 9b3712e0bf80014d35d2e4b7b23a99d63bc9e974

URL: https://github.com/llvm/llvm-project/commit/9b3712e0bf80014d35d2e4b7b23a99d63bc9e974
DIFF: https://github.com/llvm/llvm-project/commit/9b3712e0bf80014d35d2e4b7b23a99d63bc9e974.diff

LOG: [MLIR][LLVMIR] Add round intrinsic

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D126879

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
    mlir/test/Dialect/LLVMIR/roundtrip.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
index f6e65a2bcdfcb..7f426c63fa9b1 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
@@ -57,6 +57,7 @@ def LLVM_Prefetch : LLVM_ZeroResultIntrOp<"prefetch", [0]> {
                    LLVM_Type:$cache);
 }
 def LLVM_SinOp : LLVM_UnaryIntrinsicOp<"sin">;
+def LLVM_RoundOp : LLVM_UnaryIntrinsicOp<"round">;
 def LLVM_SqrtOp : LLVM_UnaryIntrinsicOp<"sqrt">;
 def LLVM_PowOp : LLVM_BinarySameArgsIntrinsicOp<"pow">;
 def LLVM_PowIOp : LLVM_BinaryIntrinsicOp<"powi">;

diff  --git a/mlir/test/Dialect/LLVMIR/roundtrip.mlir b/mlir/test/Dialect/LLVMIR/roundtrip.mlir
index 0158a05b521db..97d093f6ef897 100644
--- a/mlir/test/Dialect/LLVMIR/roundtrip.mlir
+++ b/mlir/test/Dialect/LLVMIR/roundtrip.mlir
@@ -155,6 +155,9 @@ func.func @ops(%arg0: i32, %arg1: f32,
 // CHECK: "llvm.intr.ctpop"(%{{.*}}) : (i32) -> i32
   %33 = "llvm.intr.ctpop"(%arg0) : (i32) -> i32
 
+// CHECK: "llvm.intr.round"(%[[FLOAT]]) : (f32) -> f32
+  %34 = "llvm.intr.round"(%arg1) : (f32) -> f32
+
 // CHECK: "llvm.intr.memcpy"(%{{.*}}, %{{.*}}, %{{.*}}, %{{.*}}) : (!llvm.ptr<i8>, !llvm.ptr<i8>, i32, i1) -> ()
   "llvm.intr.memcpy"(%arg2, %arg3, %arg0, %arg4) : (!llvm.ptr<i8>, !llvm.ptr<i8>, i32, i1) -> ()
 


        


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