[Mlir-commits] [mlir] 06dbcf7 - [MLIR][OpenMP] Add a constraint to the Threadprivate Op

[Kiran Chandramohan]

Author: Kiran Chandramohan
Date: 2022-07-22T13:12:24Z
New Revision: 06dbcf7b2bbe5beb3174c33cced029a2fac87168

URL: https://github.com/llvm/llvm-project/commit/06dbcf7b2bbe5beb3174c33cced029a2fac87168
DIFF: https://github.com/llvm/llvm-project/commit/06dbcf7b2bbe5beb3174c33cced029a2fac87168.diff

LOG: [MLIR][OpenMP] Add a constraint to the Threadprivate Op

Add a constraint to ensure that the operand and result of the
threadprivate operation are the same.

Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D128609

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
    mlir/test/Dialect/OpenMP/invalid.mlir

Removed: 
    


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diff  --git a/mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td b/mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
index d2a232b080190..b39328be4d618 100644
--- a/mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
+++ b/mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
@@ -1234,7 +1234,8 @@ def AtomicCaptureOp : OpenMP_Op<"atomic.capture",
 // [5.1] 2.21.2 threadprivate Directive
 //===----------------------------------------------------------------------===//
 
-def ThreadprivateOp : OpenMP_Op<"threadprivate"> {
+def ThreadprivateOp : OpenMP_Op<"threadprivate",
+                                [AllTypesMatch<["sym_addr", "tls_addr"]>]> {
   let summary = "threadprivate directive";
   let description = [{
     The threadprivate directive specifies that variables are replicated, with

diff  --git a/mlir/test/Dialect/OpenMP/invalid.mlir b/mlir/test/Dialect/OpenMP/invalid.mlir
index 379b8f4bfe1cc..f1401a7b31954 100644
--- a/mlir/test/Dialect/OpenMP/invalid.mlir
+++ b/mlir/test/Dialect/OpenMP/invalid.mlir
@@ -1419,3 +1419,14 @@ func.func @taskloop(%lb: i32, %ub: i32, %step: i32) {
   }
   return
 }
+
+// -----
+
+func.func @omp_threadprivate() {
+  %1 = llvm.mlir.addressof @_QFsubEx : !llvm.ptr<i32>
+  // expected-error @below {{op failed to verify that all of {sym_addr, tls_addr} have same type}}
+  %2 = omp.threadprivate %1 : !llvm.ptr<i32> -> memref<i32>
+  return
+}
+
+llvm.mlir.global internal @_QFsubEx() : i32