[Mlir-commits] [mlir] a1ec0d8 - [mlir] Flip dialects to _Prefixed
Jacques Pienaar
llvmlistbot at llvm.org
Thu Jul 21 12:03:13 PDT 2022
Author: Jacques Pienaar
Date: 2022-07-21T12:03:07-07:00
New Revision: a1ec0d8bdccab1d28e009375209965017c872d3d
URL: https://github.com/llvm/llvm-project/commit/a1ec0d8bdccab1d28e009375209965017c872d3d
DIFF: https://github.com/llvm/llvm-project/commit/a1ec0d8bdccab1d28e009375209965017c872d3d.diff
LOG: [mlir] Flip dialects to _Prefixed
At least two weeks passed since flipped to _Both. Made some additional
NFC changes in .td files that were not converted earlier.
Added:
Modified:
mlir/include/mlir/Dialect/AMDGPU/AMDGPU.td
mlir/include/mlir/Dialect/AMX/AMX.td
mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
mlir/include/mlir/Dialect/DLTI/DLTIBase.td
mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
mlir/include/mlir/Dialect/Quant/QuantOpsBase.td
mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
mlir/include/mlir/Dialect/X86Vector/X86Vector.td
mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/AMDGPU/AMDGPU.td b/mlir/include/mlir/Dialect/AMDGPU/AMDGPU.td
index ef54628cb81c9..fe97f8e9e9368 100644
--- a/mlir/include/mlir/Dialect/AMDGPU/AMDGPU.td
+++ b/mlir/include/mlir/Dialect/AMDGPU/AMDGPU.td
@@ -22,7 +22,7 @@ def AMDGPU_Dialect : Dialect {
that will eventually be executed on AMD hardware.
}];
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//
diff --git a/mlir/include/mlir/Dialect/AMX/AMX.td b/mlir/include/mlir/Dialect/AMX/AMX.td
index f86281213c894..eda90d4bf084c 100644
--- a/mlir/include/mlir/Dialect/AMX/AMX.td
+++ b/mlir/include/mlir/Dialect/AMX/AMX.td
@@ -56,7 +56,7 @@ def AMX_Dialect : Dialect {
https://software.intel.com/content/www/us/en/develop/articles/intel-sdm.html
}];
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//
diff --git a/mlir/include/mlir/Dialect/Affine/IR/AffineOps.td b/mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
index 6d88d10898cb4..4252c622070d2 100644
--- a/mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
+++ b/mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
@@ -25,7 +25,7 @@ def Affine_Dialect : Dialect {
let hasConstantMaterializer = 1;
let dependentDialects = ["arith::ArithmeticDialect"];
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
// Base class for Affine dialect ops.
@@ -78,7 +78,7 @@ def AffineApplyOp : Affine_Op<"apply", [NoSideEffect]> {
let extraClassDeclaration = [{
/// Returns the affine map to be applied by this operation.
- AffineMap getAffineMap() { return map(); }
+ AffineMap getAffineMap() { return getMap(); }
/// Returns the affine value map computed from this operation.
AffineValueMap getAffineValueMap();
@@ -445,26 +445,26 @@ def AffineIfOp : Affine_Op<"if",
void setConditional(IntegerSet set, ValueRange operands);
/// Returns true if an else block exists.
- bool hasElse() { return !elseRegion().empty(); }
+ bool hasElse() { return !getElseRegion().empty(); }
Block *getThenBlock() {
- assert(!thenRegion().empty() && "Unexpected empty 'then' region.");
- return &thenRegion().front();
+ assert(!getThenRegion().empty() && "Unexpected empty 'then' region.");
+ return &getThenRegion().front();
}
Block *getElseBlock() {
assert(hasElse() && "Empty 'else' region.");
- return &elseRegion().front();
+ return &getElseRegion().front();
}
OpBuilder getThenBodyBuilder() {
- assert(!thenRegion().empty() && "Unexpected empty 'then' region.");
- Block &body = thenRegion().front();
+ assert(!getThenRegion().empty() && "Unexpected empty 'then' region.");
+ Block &body = getThenRegion().front();
return OpBuilder(&body, std::prev(body.end()));
}
OpBuilder getElseBodyBuilder() {
assert(hasElse() && "No 'else' block");
- Block &body = elseRegion().front();
+ Block &body = getElseRegion().front();
return OpBuilder(&body, std::prev(body.end()));
}
}];
@@ -556,14 +556,14 @@ class AffineMinMaxOpBase<string mnemonic, list<Trait> traits = []> :
let extraClassDeclaration = [{
static StringRef getMapAttrStrName() { return "map"; }
- AffineMap getAffineMap() { return map(); }
+ AffineMap getAffineMap() { return getMap(); }
ValueRange getMapOperands() { return operands(); }
ValueRange getDimOperands() {
return OperandRange{operands().begin(),
- operands().begin() + map().getNumDims()};
+ operands().begin() + getMap().getNumDims()};
}
ValueRange getSymbolOperands() {
- return OperandRange{operands().begin() + map().getNumDims(),
+ return OperandRange{operands().begin() + getMap().getNumDims(),
operands().end()};
}
}];
@@ -747,8 +747,8 @@ def AffineParallelOp : Affine_Op<"parallel",
/// Returns `true` if the loop bounds have min/max expressions.
bool hasMinMaxBounds() {
- return lowerBoundsMap().getNumResults() != getNumDims() ||
- upperBoundsMap().getNumResults() != getNumDims();
+ return getLowerBoundsMap().getNumResults() != getNumDims() ||
+ getUpperBoundsMap().getNumResults() != getNumDims();
}
}];
@@ -803,7 +803,7 @@ def AffinePrefetchOp : Affine_Op<"prefetch",
let extraClassDeclaration = [{
MemRefType getMemRefType() {
- return memref().getType().cast<MemRefType>();
+ return getMemref().getType().cast<MemRefType>();
}
/// Returns the affine map used to index the memref for this operation.
@@ -815,7 +815,7 @@ def AffinePrefetchOp : Affine_Op<"prefetch",
/// Impelements the AffineMapAccessInterface.
/// Returns the AffineMapAttr associated with 'memref'.
NamedAttribute getAffineMapAttrForMemRef(Value mref) {
- assert(mref == memref() &&
+ assert(mref == getMemref() &&
"Expected mref argument to match memref operand");
return {StringAttr::get(getContext(), getMapAttrStrName()),
getAffineMapAttr()};
@@ -986,7 +986,7 @@ def AffineVectorLoadOp : AffineLoadOpBase<"vector_load"> {
let extraClassDeclaration = extraClassDeclarationBase # [{
VectorType getVectorType() {
- return result().getType().cast<VectorType>();
+ return getResult().getType().cast<VectorType>();
}
}];
@@ -1052,7 +1052,7 @@ def AffineVectorStoreOp : AffineStoreOpBase<"vector_store"> {
let extraClassDeclaration = extraClassDeclarationBase # [{
VectorType getVectorType() {
- return value().getType().cast<VectorType>();
+ return getValue().getType().cast<VectorType>();
}
}];
diff --git a/mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td b/mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
index 96639fbb70d33..e0f3358c4817a 100644
--- a/mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
+++ b/mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
@@ -29,7 +29,7 @@ def ArmNeon_Dialect : Dialect {
// this dialect (such as canonicalization) do not produce entities belonging
// to the LLVMDialect (ops or types).
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//
@@ -133,19 +133,19 @@ def Sdot2dOp : ArmNeon_2dOp<"sdot", [
AllTypesMatch<["a", "res"]>,
PredOpTrait<
"operand `a` should be 1-dimensional",
- CPred<"a().getType().cast<VectorType>().getShape().size() == 1">
+ CPred<"getA().getType().cast<VectorType>().getShape().size() == 1">
>,
PredOpTrait<
"operand `b` should be 2-dimensional",
- CPred<"b().getType().cast<VectorType>().getShape().size() == 2">
+ CPred<"getB().getType().cast<VectorType>().getShape().size() == 2">
>,
PredOpTrait<
"operand `b` should have 4 columns",
- CPred<"b().getType().cast<VectorType>().getShape()[1] == 4">
+ CPred<"getB().getType().cast<VectorType>().getShape()[1] == 4">
>,
PredOpTrait<
"operand `b` should have as many rows as the size of operand `a`",
- CPred<"b().getType().cast<VectorType>().getShape()[0] == a().getType().cast<VectorType>().getShape()[0]">
+ CPred<"getB().getType().cast<VectorType>().getShape()[0] == getA().getType().cast<VectorType>().getShape()[0]">
>,
]
> {
diff --git a/mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td b/mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
index f1cbfcae24709..da9d165e3d6f5 100644
--- a/mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
+++ b/mlir/include/mlir/Dialect/ArmSVE/ArmSVE.td
@@ -29,7 +29,7 @@ def ArmSVE_Dialect : Dialect {
scalable vector operations.
}];
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//
diff --git a/mlir/include/mlir/Dialect/DLTI/DLTIBase.td b/mlir/include/mlir/Dialect/DLTI/DLTIBase.td
index 1bb325dfb216e..98fc68f4406c5 100644
--- a/mlir/include/mlir/Dialect/DLTI/DLTIBase.td
+++ b/mlir/include/mlir/Dialect/DLTI/DLTIBase.td
@@ -38,7 +38,7 @@ def DLTI_Dialect : Dialect {
let useDefaultAttributePrinterParser = 1;
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
def DLTI_DataLayoutEntryAttr : DialectAttr<
diff --git a/mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td b/mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
index 47c0208acb5e6..3050da070d42b 100644
--- a/mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
+++ b/mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
@@ -32,7 +32,7 @@ def EmitC_Dialect : Dialect {
let useDefaultTypePrinterParser = 1;
let useDefaultAttributePrinterParser = 1;
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
#endif // MLIR_DIALECT_EMITC_IR_EMITCBASE
diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
index 31bf6a66049bc..fffa67ba88ec8 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
@@ -38,7 +38,7 @@ def NVVM_Dialect : Dialect {
let useDefaultAttributePrinterParser = 1;
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//
diff --git a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
index fed692c7cf0f5..5cd634133f05c 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
@@ -32,7 +32,7 @@ def ROCDL_Dialect : Dialect {
static StringRef getKernelFuncAttrName() { return "rocdl.kernel"; }
}];
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//
@@ -189,7 +189,7 @@ def ROCDL_MubufStoreOp :
LLVM_Type:$glc,
LLVM_Type:$slc)>{
string llvmBuilder = [{
- auto vdataType = moduleTranslation.convertType(op.vdata().getType());
+ auto vdataType = moduleTranslation.convertType(op.getVdata().getType());
createIntrinsicCall(builder,
llvm::Intrinsic::amdgcn_buffer_store, {$vdata, $rsrc, $vindex,
$offset, $glc, $slc}, {vdataType});
@@ -223,7 +223,7 @@ def ROCDL_RawBufferStoreOp :
LLVM_Type:$soffset,
LLVM_Type:$aux)>{
string llvmBuilder = [{
- auto vdataType = moduleTranslation.convertType(op.vdata().getType());
+ auto vdataType = moduleTranslation.convertType(op.getVdata().getType());
createIntrinsicCall(builder,
llvm::Intrinsic::amdgcn_raw_buffer_store, {$vdata, $rsrc,
$offset, $soffset, $aux}, {vdataType});
@@ -242,7 +242,7 @@ def ROCDL_RawBufferAtomicFAddOp :
LLVM_Type:$soffset,
LLVM_Type:$aux)>{
string llvmBuilder = [{
- auto vdataType = moduleTranslation.convertType(op.vdata().getType());
+ auto vdataType = moduleTranslation.convertType(op.getVdata().getType());
createIntrinsicCall(builder,
llvm::Intrinsic::amdgcn_raw_buffer_atomic_fadd, {$vdata, $rsrc,
$offset, $soffset, $aux}, {vdataType});
diff --git a/mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td b/mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
index daeb7b896a2e4..cd1b87d65108d 100644
--- a/mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
+++ b/mlir/include/mlir/Dialect/MemRef/IR/MemRefOps.td
@@ -34,7 +34,7 @@ class MemRef_OpWithOffsetSizesAndStrides<string mnemonic,
: MemRef_Op<mnemonic, traits> {
code extraBaseClassDeclaration = [{
/// Returns the dynamic sizes for this subview operation if specified.
- ::mlir::Operation::operand_range getDynamicSizes() { return sizes(); }
+ ::mlir::Operation::operand_range getDynamicSizes() { return getSizes(); }
/// Return the list of Range (i.e. offset, size, stride). Each
/// Range entry contains either the dynamic value or a ConstantIndexOp
@@ -373,7 +373,7 @@ def MemRef_CastOp : MemRef_Op<"cast", [
/// Fold the given CastOp into consumer op.
static bool canFoldIntoConsumerOp(CastOp castOp);
- Value getViewSource() { return source(); }
+ Value getViewSource() { return getSource(); }
}];
let hasFolder = 1;
@@ -748,7 +748,7 @@ def GenericAtomicRMWOp : MemRef_Op<"generic_atomic_rmw", [
return getRegion().getArgument(0);
}
MemRefType getMemRefType() {
- return memref().getType().cast<MemRefType>();
+ return getMemref().getType().cast<MemRefType>();
}
}];
let hasCustomAssemblyFormat = 1;
@@ -855,9 +855,9 @@ def MemRef_GlobalOp : MemRef_Op<"global", [Symbol]> {
}];
let extraClassDeclaration = [{
- bool isExternal() { return !initial_value(); }
+ bool isExternal() { return !getInitialValue(); }
bool isUninitialized() {
- return !isExternal() && initial_value()->isa<UnitAttr>();
+ return !isExternal() && getInitialValue()->isa<UnitAttr>();
}
/// Returns the constant initial value if the memref.global is a constant,
/// or null otherwise.
@@ -971,7 +971,7 @@ def MemRef_PrefetchOp : MemRef_Op<"prefetch"> {
let extraClassDeclaration = [{
MemRefType getMemRefType() {
- return memref().getType().cast<MemRefType>();
+ return getMemref().getType().cast<MemRefType>();
}
static StringRef getLocalityHintAttrStrName() { return "localityHint"; }
static StringRef getIsWriteAttrStrName() { return "isWrite"; }
@@ -1054,7 +1054,7 @@ def MemRef_ReinterpretCastOp
let extraClassDeclaration = extraBaseClassDeclaration # [{
// The result of the op is always a ranked memref.
MemRefType getType() { return getResult().getType().cast<MemRefType>(); }
- Value getViewSource() { return source(); }
+ Value getViewSource() { return getSource(); }
/// Return the rank of the source ShapedType.
unsigned getResultRank() {
@@ -1154,7 +1154,7 @@ def MemRef_ReshapeOp: MemRef_Op<"reshape", [
let extraClassDeclaration = [{
MemRefType getType() { return getResult().getType().cast<MemRefType>(); }
- Value getViewSource() { return source(); }
+ Value getViewSource() { return getSource(); }
}];
let assemblyFormat = [{
@@ -1180,7 +1180,7 @@ class MemRef_ReassociativeReshapeOp<string mnemonic, list<Trait> traits = []> :
SmallVector<ReassociationIndices, 4> getReassociationIndices() {
SmallVector<ReassociationIndices, 4> reassociationIndices;
- for (auto attr : reassociation())
+ for (auto attr : getReassociation())
reassociationIndices.push_back(llvm::to_vector<2>(
llvm::map_range(attr.cast<ArrayAttr>(), [&](Attribute indexAttr) {
return indexAttr.cast<IntegerAttr>().getInt();
@@ -1188,11 +1188,11 @@ class MemRef_ReassociativeReshapeOp<string mnemonic, list<Trait> traits = []> :
return reassociationIndices;
};
- MemRefType getSrcType() { return src().getType().cast<MemRefType>(); }
+ MemRefType getSrcType() { return getSrc().getType().cast<MemRefType>(); }
- MemRefType getResultType() { return result().getType().cast<MemRefType>(); }
+ MemRefType getResultType() { return getResult().getType().cast<MemRefType>(); }
- Value getViewSource() { return src(); }
+ Value getViewSource() { return getSrc(); }
}];
let assemblyFormat = [{
@@ -1628,7 +1628,7 @@ def SubViewOp : MemRef_OpWithOffsetSizesAndStrides<"subview", [
let extraClassDeclaration = extraBaseClassDeclaration # [{
/// Returns the type of the base memref operand.
MemRefType getSourceType() {
- return source().getType().cast<MemRefType>();
+ return getSource().getType().cast<MemRefType>();
}
/// The result of a subview is always a memref.
@@ -1741,7 +1741,7 @@ def MemRef_TransposeOp : MemRef_Op<"transpose", [NoSideEffect]>,
let extraClassDeclaration = [{
static StringRef getPermutationAttrStrName() { return "permutation"; }
- ShapedType getShapedType() { return in().getType().cast<ShapedType>(); }
+ ShapedType getShapedType() { return getIn().getType().cast<ShapedType>(); }
}];
let hasCustomAssemblyFormat = 1;
@@ -1810,7 +1810,7 @@ def MemRef_ViewOp : MemRef_Op<"view", [
/// Region *region)
/// ```
operand_range getDynamicSizes() {
- return {sizes().begin(), sizes().end()};
+ return {getSizes().begin(), getSizes().end()};
}
}];
@@ -1864,7 +1864,7 @@ def AtomicRMWOp : MemRef_Op<"atomic_rmw", [
let extraClassDeclaration = [{
MemRefType getMemRefType() {
- return memref().getType().cast<MemRefType>();
+ return getMemref().getType().cast<MemRefType>();
}
}];
let hasFolder = 1;
diff --git a/mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td b/mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
index a25b9aa068077..737752bc2be84 100644
--- a/mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
+++ b/mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
@@ -35,7 +35,7 @@ def NVGPU_Dialect : Dialect {
let useDefaultTypePrinterParser = 1;
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
/// Device-side synchronization token.
diff --git a/mlir/include/mlir/Dialect/Quant/QuantOpsBase.td b/mlir/include/mlir/Dialect/Quant/QuantOpsBase.td
index bc56aea18deb0..d0f1a9570b0f4 100644
--- a/mlir/include/mlir/Dialect/Quant/QuantOpsBase.td
+++ b/mlir/include/mlir/Dialect/Quant/QuantOpsBase.td
@@ -21,7 +21,7 @@ def Quantization_Dialect : Dialect {
let useDefaultTypePrinterParser = 1;
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//
diff --git a/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td b/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
index 0518312da1ffe..c19e3e016ddae 100644
--- a/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
+++ b/mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
@@ -75,7 +75,7 @@ def SparseTensor_Dialect : Dialect {
let useDefaultAttributePrinterParser = 1;
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
#endif // SPARSETENSOR_BASE
diff --git a/mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td b/mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
index 5af7fb6e42382..3c325e1c3ff47 100644
--- a/mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
+++ b/mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
@@ -51,6 +51,7 @@ def Tensor_Dialect : Dialect {
"complex::ComplexDialect",
];
+ // TODO: flip post changing ViewLike interface.
let emitAccessorPrefix = kEmitAccessorPrefix_Both;
}
diff --git a/mlir/include/mlir/Dialect/X86Vector/X86Vector.td b/mlir/include/mlir/Dialect/X86Vector/X86Vector.td
index 664cd9408698e..c67704517d95a 100644
--- a/mlir/include/mlir/Dialect/X86Vector/X86Vector.td
+++ b/mlir/include/mlir/Dialect/X86Vector/X86Vector.td
@@ -25,7 +25,7 @@ def X86Vector_Dialect : Dialect {
let name = "x86vector";
let cppNamespace = "::mlir::x86vector";
- let emitAccessorPrefix = kEmitAccessorPrefix_Both;
+ let emitAccessorPrefix = kEmitAccessorPrefix_Prefixed;
}
//===----------------------------------------------------------------------===//
diff --git a/mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp b/mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
index 6490320dab7cc..6bc49d55a9946 100644
--- a/mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
+++ b/mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
@@ -358,11 +358,11 @@ LogicalResult UnaryOp::verify() {
}
LogicalResult ReduceOp::verify() {
- Type inputType = x().getType();
+ Type inputType = getX().getType();
LogicalResult regionResult = success();
// Check correct number of block arguments and return type.
- Region &formula = region();
+ Region &formula = getRegion();
if (!formula.empty()) {
regionResult = verifyNumBlockArgs(
this, formula, "reduce", TypeRange{inputType, inputType}, inputType);
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