[Mlir-commits] [mlir] 31b7f88 - [mlir][vector][integration] Reactivate LLI in vector integration test.

[Nicolas Vasilache]

Author: Nicolas Vasilache
Date: 2022-02-01T08:00:50-05:00
New Revision: 31b7f8857f4cd9c182b397ebf55db049318b3d7d

URL: https://github.com/llvm/llvm-project/commit/31b7f8857f4cd9c182b397ebf55db049318b3d7d
DIFF: https://github.com/llvm/llvm-project/commit/31b7f8857f4cd9c182b397ebf55db049318b3d7d.diff

LOG: [mlir][vector][integration] Reactivate LLI in vector integration test.

The test introduced in https://reviews.llvm.org/D118006 was missing a return and would
introduce a non-0 return which would fail tests.

Added: 
    

Modified: 
    mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir
index 310815e22a81..fa2994c76b71 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-inline-asm-vector-avx512.mlir
@@ -1,9 +1,7 @@
 // RUN: mlir-opt %s -convert-linalg-to-loops -convert-vector-to-scf='full-unroll=true' -lower-affine -convert-scf-to-std -convert-vector-to-llvm -convert-memref-to-llvm  -convert-std-to-llvm='use-bare-ptr-memref-call-conv=1' -convert-arith-to-llvm -reconcile-unrealized-casts |\
-// RUN: mlir-translate --mlir-to-llvmir
-
-// TODO: Reactivate the following, it produces the right result but somehow a return error code 2 or 10 sneaks in.
-// R-UN: %lli --entry-function=entry --mattr="avx512f" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext
-// R-UN: FileCheck %s
+// RUN: mlir-translate --mlir-to-llvmir |\
+// RUN: %lli --entry-function=entry --mattr="avx512f" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext |\
+// RUN: FileCheck %s
 
 module {
 
@@ -12,7 +10,7 @@ module {
     dense<[0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15]> : tensor<16 x i32>)
       : !llvm.array<16 x i32>
 
-  llvm.func @entry() {
+  llvm.func @entry() -> i32 {
     %c0 = llvm.mlir.constant(0 : index) : i64
 
     %1 = llvm.mlir.addressof @const16 : !llvm.ptr<array<16 x i32>>
@@ -36,7 +34,8 @@ module {
     %v9 = vector.extract %v[9]: vector<16xi32>
     vector.print %v9 : i32
 
-    llvm.return
+    %i0 = arith.constant 0 : i32
+    llvm.return %i0 : i32
   }
 }