[Mlir-commits] [mlir] 9a97296 - [mlir] Typos in affine dialect

Kai Sasaki llvmlistbot at llvm.org
Mon Dec 26 16:33:05 PST 2022


Author: Kai Sasaki
Date: 2022-12-27T09:30:00+09:00
New Revision: 9a97296dd51061cf8dddbc17c11ddf3a6f2cac38

URL: https://github.com/llvm/llvm-project/commit/9a97296dd51061cf8dddbc17c11ddf3a6f2cac38
DIFF: https://github.com/llvm/llvm-project/commit/9a97296dd51061cf8dddbc17c11ddf3a6f2cac38.diff

LOG: [mlir] Typos in affine dialect

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/Affine/Passes.td
    mlir/lib/Dialect/Affine/Utils/Utils.cpp

Removed: 
    


################################################################################
diff  --git a/mlir/include/mlir/Dialect/Affine/Passes.td b/mlir/include/mlir/Dialect/Affine/Passes.td
index 493fb39cd91e5..b3efdc5872b3d 100644
--- a/mlir/include/mlir/Dialect/Affine/Passes.td
+++ b/mlir/include/mlir/Dialect/Affine/Passes.td
@@ -299,7 +299,7 @@ def AffinePipelineDataTransfer
 }
 
 def AffineScalarReplacement : Pass<"affine-scalrep", "func::FuncOp"> {
-  let summary = "Replace affine memref acceses by scalars by forwarding stores "
+  let summary = "Replace affine memref accesses by scalars by forwarding stores "
                 "to loads and eliminating redundant loads";
   let description = [{
     This pass performs store to load forwarding and redundant load elimination

diff  --git a/mlir/lib/Dialect/Affine/Utils/Utils.cpp b/mlir/lib/Dialect/Affine/Utils/Utils.cpp
index 9359fde079e99..ff249008a5cc8 100644
--- a/mlir/lib/Dialect/Affine/Utils/Utils.cpp
+++ b/mlir/lib/Dialect/Affine/Utils/Utils.cpp
@@ -865,7 +865,7 @@ static LogicalResult forwardStoreToLoad(
 
     // We now have a candidate for forwarding.
     assert(lastWriteStoreOp == nullptr &&
-           "multiple simulataneous replacement stores");
+           "multiple simultaneous replacement stores");
     lastWriteStoreOp = storeOp;
   }
 


        


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