[Mlir-commits] [mlir] 7e52e0f - [mlir][amdgpu] Fix signed/unsigned comparison for abid/cbsz comparison

[Rob Suderman]

Author: Rob Suderman
Date: 2022-08-31T15:29:31-07:00
New Revision: 7e52e0fc723e8b45cfc1eaf2ebbe8f6d89e4e7f2

URL: https://github.com/llvm/llvm-project/commit/7e52e0fc723e8b45cfc1eaf2ebbe8f6d89e4e7f2
DIFF: https://github.com/llvm/llvm-project/commit/7e52e0fc723e8b45cfc1eaf2ebbe8f6d89e4e7f2.diff

LOG: [mlir][amdgpu] Fix signed/unsigned comparison for abid/cbsz comparison

Unsigned/signed comparison failure due to implicit signed value.

Reviewed By: stella.stamenova

Differential Revision: https://reviews.llvm.org/D133061

Added: 
    

Modified: 
    mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp

Removed: 
    


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diff  --git a/mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp b/mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
index 05b0e621cf0f..26db766898c1 100644
--- a/mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
+++ b/mlir/lib/Dialect/AMDGPU/IR/AMDGPUDialect.cpp
@@ -111,7 +111,7 @@ LogicalResult MFMAOp::verify() {
   if (destElem.isF64() && getCbsz() != 0)
     return emitOpError(
         "double-precision ops do not support permuting lanes of A");
-  if (getAbid() >= (1 << getCbsz()))
+  if (getAbid() >= (1u << getCbsz()))
     return emitOpError(
         "block ID for permuting A (abid) must be below 2 ** cbsz");