[Mlir-commits] [mlir] 491dd5a - [mlir][LLVMIR] Fix syntax in integration tests (NFC)

[Jeff Niu]

Author: Jeff Niu
Date: 2022-08-18T13:09:34-04:00
New Revision: 491dd5a3b2fc243098e7702f63561eb062dfe798

URL: https://github.com/llvm/llvm-project/commit/491dd5a3b2fc243098e7702f63561eb062dfe798
DIFF: https://github.com/llvm/llvm-project/commit/491dd5a3b2fc243098e7702f63561eb062dfe798.diff

LOG: [mlir][LLVMIR] Fix syntax in integration tests (NFC)

Added: 
    

Modified: 
    mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
    mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir

Removed: 
    


################################################################################
diff  --git a/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir b/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
index 5e95050d4fd2d..dc730f09034a9 100644
--- a/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
+++ b/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir
@@ -15,8 +15,7 @@ module {
     %4 = llvm.mlir.undef : vector<4xf32>
     %5 = llvm.mlir.constant(0 : index) : i64
     %6 = llvm.insertelement %0, %4[%5 : i64] : vector<4xf32>
-    %7 = llvm.shufflevector %6, %4 [0, 0, 0, 0]
-        : vector<4xf32>, vector<4xf32>
+    %7 = llvm.shufflevector %6, %4 [0, 0, 0, 0] : vector<4xf32>
     %8 = llvm.mlir.constant(1 : i64) : i64
     %9 = llvm.insertelement %1, %7[%8 : i64] : vector<4xf32>
     %10 = llvm.mlir.constant(2 : i64) : i64

diff  --git a/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir b/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
index 451315ea18453..01421ee4e122d 100644
--- a/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
+++ b/mlir/test/Integration/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir
@@ -15,8 +15,7 @@ module {
     %4 = llvm.mlir.undef : vector<4xi64>
     %5 = llvm.mlir.constant(0 : index) : i64
     %6 = llvm.insertelement %0, %4[%5 : i64] : vector<4xi64>
-    %7 = llvm.shufflevector %6, %4 [0, 0, 0, 0]
-        : vector<4xi64>, vector<4xi64>
+    %7 = llvm.shufflevector %6, %4 [0, 0, 0, 0] : vector<4xi64>
     %8 = llvm.mlir.constant(1 : i64) : i64
     %9 = llvm.insertelement %1, %7[%8 : i64] : vector<4xi64>
     %10 = llvm.mlir.constant(2 : i64) : i64