[Mlir-commits] [mlir] 3b9bee1 - [mlir][sparse] fix asan leak of two sparse vectors

[Aart Bik]

Author: Aart Bik
Date: 2022-08-01T10:55:20-07:00
New Revision: 3b9bee1651af739951e82c5ed93ffc69075b5cce

URL: https://github.com/llvm/llvm-project/commit/3b9bee1651af739951e82c5ed93ffc69075b5cce
DIFF: https://github.com/llvm/llvm-project/commit/3b9bee1651af739951e82c5ed93ffc69075b5cce.diff

LOG: [mlir][sparse] fix asan leak of two sparse vectors

Reviewed By: Peiming

Differential Revision: https://reviews.llvm.org/D130914

Added: 
    

Modified: 
    mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir

Removed: 
    


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diff  --git a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
index bfce26d0ed23b..6879b12b3de0a 100644
--- a/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
+++ b/mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_binary.mlir
@@ -537,6 +537,8 @@ module {
     // Release the resources.
     bufferization.dealloc_tensor %sv1 : tensor<?xf64, #SparseVector>
     bufferization.dealloc_tensor %sv2 : tensor<?xf64, #SparseVector>
+    bufferization.dealloc_tensor %sv1_si : tensor<?xi32, #SparseVector>
+    bufferization.dealloc_tensor %sv2_si : tensor<?xi32, #SparseVector>
     bufferization.dealloc_tensor %sm1 : tensor<?x?xf64, #DCSR>
     bufferization.dealloc_tensor %sm2 : tensor<?x?xf64, #DCSR>
     bufferization.dealloc_tensor %sm3 : tensor<4x4xf64, #DCSR>