[Mlir-commits] [mlir] 590a389 - [mlir][LLVMIR] Add vector predication type cast intrinsic ops.
llvmlistbot at llvm.org
llvmlistbot at llvm.org
Tue Apr 19 19:11:52 PDT 2022
Author: jacquesguan
Date: 2022-04-20T02:11:14Z
New Revision: 590a38920f6f13f8d9a7e605b60ca12e597cfdb7
URL: https://github.com/llvm/llvm-project/commit/590a38920f6f13f8d9a7e605b60ca12e597cfdb7
DIFF: https://github.com/llvm/llvm-project/commit/590a38920f6f13f8d9a7e605b60ca12e597cfdb7.diff
LOG: [mlir][LLVMIR] Add vector predication type cast intrinsic ops.
This patch adds vector predication type cast intrinsic ops.
Reviewed By: ftynse
Differential Revision: https://reviews.llvm.org/D123996
Added:
Modified:
mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
index 9a5473aaed7da..f6e65a2bcdfcb 100644
--- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
+++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
@@ -449,6 +449,17 @@ class LLVM_VPSelectBase<string mnem>
Arguments<(ins LLVM_VectorOf<I1>:$cond, LLVM_AnyVector:$true_val,
LLVM_AnyVector:$false_val, I32:$evl)>;
+class LLVM_VPCastBase<string mnem, Type element>
+ : LLVM_OneResultIntrOp<"vp." # mnem, [0], [0], [NoSideEffect]>,
+ Arguments<(ins LLVM_VectorOf<element>:$src,
+ LLVM_VectorOf<I1>:$mask, I32:$evl)>;
+
+class LLVM_VPCastI<string mnem> : LLVM_VPCastBase<mnem, AnyInteger>;
+
+class LLVM_VPCastF<string mnem> : LLVM_VPCastBase<mnem, AnyFloat>;
+
+class LLVM_VPCastPtr<string mnem> : LLVM_VPCastBase<mnem, LLVM_AnyPointer>;
+
// Integer Binary
def LLVM_VPAddOp : LLVM_VPBinaryI<"add">;
def LLVM_VPSubOp : LLVM_VPBinaryI<"sub">;
@@ -520,4 +531,20 @@ def LLVM_VPStridedStoreOp
Arguments<(ins LLVM_AnyVector:$val, LLVM_AnyPointer:$ptr,
AnyInteger:$stride, LLVM_VectorOf<I1>:$mask, I32:$evl)>;
+def LLVM_VPTruncOp : LLVM_VPCastI<"trunc">;
+def LLVM_VPZExtOp : LLVM_VPCastI<"zext">;
+def LLVM_VPSExtOp : LLVM_VPCastI<"sext">;
+
+def LLVM_VPFPTruncOp : LLVM_VPCastF<"fptrunc">;
+def LLVM_VPFPExtOp : LLVM_VPCastF<"fpext">;
+
+def LLVM_VPFPToUIOp : LLVM_VPCastF<"fptoui">;
+def LLVM_VPFPToSIOp : LLVM_VPCastF<"fptosi">;
+
+def LLVM_VPUIToFPOp : LLVM_VPCastI<"uitofp">;
+def LLVM_VPSIToFPOp : LLVM_VPCastI<"sitofp">;
+
+def LLVM_VPPtrToIntOp : LLVM_VPCastPtr<"ptrtoint">;
+def LLVM_VPIntToPtrOp : LLVM_VPCastI<"inttoptr">;
+
#endif // LLVM_INTRINSIC_OPS
\ No newline at end of file
diff --git a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
index 4fcf8c2b0a03d..ea0b40b380ecb 100644
--- a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
+++ b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
@@ -518,6 +518,8 @@ llvm.func @stack_restore(%arg0: !llvm.ptr<i8>) {
// CHECK-LABEL: @vector_predication_intrinsics
llvm.func @vector_predication_intrinsics(%A: vector<8xi32>, %B: vector<8xi32>,
%C: vector<8xf32>, %D: vector<8xf32>,
+ %E: vector<8xi64>, %F: vector<8xf64>,
+ %G: !llvm.vec<8 x !llvm.ptr<i32>>,
%i: i32, %f: f32,
%iptr : !llvm.ptr<i32>,
%fptr : !llvm.ptr<f32>,
@@ -645,6 +647,36 @@ llvm.func @vector_predication_intrinsics(%A: vector<8xi32>, %B: vector<8xi32>,
"llvm.intr.experimental.vp.strided.load" (%iptr, %i, %mask, %evl) :
(!llvm.ptr<i32>, i32, vector<8xi1>, i32) -> vector<8xi32>
+ // CHECK: call <8 x i32> @llvm.vp.trunc.v8i32.v8i64
+ "llvm.intr.vp.trunc" (%E, %mask, %evl) :
+ (vector<8xi64>, vector<8xi1>, i32) -> vector<8xi32>
+ // CHECK: call <8 x i64> @llvm.vp.zext.v8i64.v8i32
+ "llvm.intr.vp.zext" (%A, %mask, %evl) :
+ (vector<8xi32>, vector<8xi1>, i32) -> vector<8xi64>
+ // CHECK: call <8 x i64> @llvm.vp.sext.v8i64.v8i32
+ "llvm.intr.vp.sext" (%A, %mask, %evl) :
+ (vector<8xi32>, vector<8xi1>, i32) -> vector<8xi64>
+
+ // CHECK: call <8 x float> @llvm.vp.fptrunc.v8f32.v8f64
+ "llvm.intr.vp.fptrunc" (%F, %mask, %evl) :
+ (vector<8xf64>, vector<8xi1>, i32) -> vector<8xf32>
+ // CHECK: call <8 x double> @llvm.vp.fpext.v8f64.v8f32
+ "llvm.intr.vp.fpext" (%C, %mask, %evl) :
+ (vector<8xf32>, vector<8xi1>, i32) -> vector<8xf64>
+
+ // CHECK: call <8 x i64> @llvm.vp.fptoui.v8i64.v8f64
+ "llvm.intr.vp.fptoui" (%F, %mask, %evl) :
+ (vector<8xf64>, vector<8xi1>, i32) -> vector<8xi64>
+ // CHECK: call <8 x i64> @llvm.vp.fptosi.v8i64.v8f64
+ "llvm.intr.vp.fptosi" (%F, %mask, %evl) :
+ (vector<8xf64>, vector<8xi1>, i32) -> vector<8xi64>
+
+ // CHECK: call <8 x i64> @llvm.vp.ptrtoint.v8i64.v8p0i32
+ "llvm.intr.vp.ptrtoint" (%G, %mask, %evl) :
+ (!llvm.vec<8 x !llvm.ptr<i32>>, vector<8xi1>, i32) -> vector<8xi64>
+ // CHECK: call <8 x i32*> @llvm.vp.inttoptr.v8p0i32.v8i64
+ "llvm.intr.vp.inttoptr" (%E, %mask, %evl) :
+ (vector<8xi64>, vector<8xi1>, i32) -> !llvm.vec<8 x !llvm.ptr<i32>>
llvm.return
}
@@ -740,3 +772,12 @@ llvm.func @vector_predication_intrinsics(%A: vector<8xi32>, %B: vector<8xi32>,
// CHECK-DAG: declare <8 x i32> @llvm.vp.merge.v8i32(<8 x i1>, <8 x i32>, <8 x i32>, i32) #12
// CHECK-DAG: declare void @llvm.experimental.vp.strided.store.v8i32.p0i32.i32(<8 x i32>, i32* nocapture, i32, <8 x i1>, i32) #4
// CHECK-DAG: declare <8 x i32> @llvm.experimental.vp.strided.load.v8i32.p0i32.i32(i32* nocapture, i32, <8 x i1>, i32) #3
+// CHECK-DAG: declare <8 x i32> @llvm.vp.trunc.v8i32.v8i64(<8 x i64>, <8 x i1>, i32) #12
+// CHECK-DAG: declare <8 x i64> @llvm.vp.zext.v8i64.v8i32(<8 x i32>, <8 x i1>, i32) #12
+// CHECK-DAG: declare <8 x i64> @llvm.vp.sext.v8i64.v8i32(<8 x i32>, <8 x i1>, i32) #12
+// CHECK-DAG: declare <8 x float> @llvm.vp.fptrunc.v8f32.v8f64(<8 x double>, <8 x i1>, i32) #12
+// CHECK-DAG: declare <8 x double> @llvm.vp.fpext.v8f64.v8f32(<8 x float>, <8 x i1>, i32) #12
+// CHECK-DAG: declare <8 x i64> @llvm.vp.fptoui.v8i64.v8f64(<8 x double>, <8 x i1>, i32) #12
+// CHECK-DAG: declare <8 x i64> @llvm.vp.fptosi.v8i64.v8f64(<8 x double>, <8 x i1>, i32) #12
+// CHECK-DAG: declare <8 x i64> @llvm.vp.ptrtoint.v8i64.v8p0i32(<8 x i32*>, <8 x i1>, i32) #12
+// CHECK-DAG: declare <8 x i32*> @llvm.vp.inttoptr.v8p0i32.v8i64(<8 x i64>, <8 x i1>, i32) #12
More information about the Mlir-commits
mailing list