[Mlir-commits] [mlir] c0a6381 - [mlir][SPIRVToLLVM] Solve ExecutionModeOp redefinition and add OpTypeSampledImage into SPV_Type

[Weiwei Li]

Author: Weiwei Li
Date: 2021-10-13T10:03:25+08:00
New Revision: c0a6381e49840b9fcf58b43e33f8484cc408e15b

URL: https://github.com/llvm/llvm-project/commit/c0a6381e49840b9fcf58b43e33f8484cc408e15b
DIFF: https://github.com/llvm/llvm-project/commit/c0a6381e49840b9fcf58b43e33f8484cc408e15b.diff

LOG: [mlir][SPIRVToLLVM] Solve ExecutionModeOp redefinition and add OpTypeSampledImage into SPV_Type

1. To avoid two ExecutionModeOp using the same name, adding the value of execution mode in name when converting to LLVM dialect.
2. To avoid syntax error in spv.OpLoad, add OpTypeSampledImage into SPV_Type.

Reviewed by:antiagainst

Differential revision:https://reviews.llvm.org/D111193

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
    mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
    mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
    mlir/test/Dialect/SPIRV/IR/memory-ops.mlir

Removed: 
    


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diff  --git a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
index 990af804f270d..1bbe01a5e8a1b 100644
--- a/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
+++ b/mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
@@ -3154,7 +3154,7 @@ def SPV_Composite :
 def SPV_Type : AnyTypeOf<[
     SPV_Void, SPV_Bool, SPV_Integer, SPV_Float, SPV_Vector,
     SPV_AnyPtr, SPV_AnyArray, SPV_AnyRTArray, SPV_AnyStruct,
-    SPV_AnyCooperativeMatrix, SPV_AnyMatrix
+    SPV_AnyCooperativeMatrix, SPV_AnyMatrix, SPV_AnySampledImage
   ]>;
 
 def SPV_SignedInt : SignedIntOfWidths<[8, 16, 32, 64]>;

diff  --git a/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp b/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
index abec151145850..889b733434411 100644
--- a/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
+++ b/mlir/lib/Conversion/SPIRVToLLVM/SPIRVToLLVM.cpp
@@ -642,15 +642,17 @@ class ExecutionModePattern
                   ConversionPatternRewriter &rewriter) const override {
     // First, create the global struct's name that would be associated with
     // this entry point's execution mode. We set it to be:
-    //   __spv__{SPIR-V module name}_{function name}_execution_mode_info
+    //   __spv__{SPIR-V module name}_{function name}_execution_mode_info_{mode}
     ModuleOp module = op->getParentOfType<ModuleOp>();
+    IntegerAttr executionModeAttr = op.execution_modeAttr();
     std::string moduleName;
     if (module.getName().hasValue())
       moduleName = "_" + module.getName().getValue().str();
     else
       moduleName = "";
-    std::string executionModeInfoName = llvm::formatv(
-        "__spv_{0}_{1}_execution_mode_info", moduleName, op.fn().str());
+    std::string executionModeInfoName =
+        llvm::formatv("__spv_{0}_{1}_execution_mode_info_{2}", moduleName,
+                      op.fn().str(), executionModeAttr.getValue());
 
     MLIRContext *context = rewriter.getContext();
     OpBuilder::InsertionGuard guard(rewriter);
@@ -683,7 +685,6 @@ class ExecutionModePattern
     // Initialize the struct and set the execution mode value.
     rewriter.setInsertionPoint(block, block->begin());
     Value structValue = rewriter.create<LLVM::UndefOp>(loc, structType);
-    IntegerAttr executionModeAttr = op.execution_modeAttr();
     Value executionMode =
         rewriter.create<LLVM::ConstantOp>(loc, llvmI32Type, executionModeAttr);
     structValue = rewriter.create<LLVM::InsertValueOp>(

diff  --git a/mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir b/mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
index 9281a308f03bf..c8528d062f7cb 100644
--- a/mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
+++ b/mlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
@@ -94,7 +94,8 @@ spv.module Logical OpenCL {
 // CHECK-NEXT:     %[[RET:.*]] = llvm.insertvalue %[[C2]], %[[T2]][1 : i32, 2 : i32] : !llvm.struct<(i32, array<3 x i32>)>
 // CHECK-NEXT:     llvm.return %[[RET]] : !llvm.struct<(i32, array<3 x i32>)>
 // CHECK-NEXT:   }
-// CHECK-NEXT:   llvm.func @bar
+// CHECK-NEXT:   llvm.mlir.global external constant @{{.*}}() : !llvm.struct<(i32)> {
+//      CHECK:   llvm.func @bar
 // CHECK-NEXT:     llvm.return
 // CHECK-NEXT:   }
 // CHECK-NEXT: }
@@ -103,6 +104,7 @@ spv.module Logical OpenCL {
     spv.Return
   }
   spv.EntryPoint "Kernel" @bar
+  spv.ExecutionMode @bar "ContractionOff"
   spv.ExecutionMode @bar "LocalSizeHint", 32, 1, 1
 }
 

diff  --git a/mlir/test/Dialect/SPIRV/IR/memory-ops.mlir b/mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
index 1ebc62286bd25..213081baebf06 100644
--- a/mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
@@ -341,11 +341,15 @@ func @aligned_load_incorrect_attributes() -> () {
 
 spv.module Logical GLSL450 {
   spv.GlobalVariable @var0 : !spv.ptr<f32, Input>
+  spv.GlobalVariable @var1 : !spv.ptr<!spv.sampled_image<!spv.image<f32, Dim2D, IsDepth, Arrayed, SingleSampled, NeedSampler, Unknown>>, UniformConstant>
   // CHECK_LABEL: @simple_load
   spv.func @simple_load() -> () "None" {
     // CHECK: spv.Load "Input" {{%.*}} : f32
     %0 = spv.mlir.addressof @var0 : !spv.ptr<f32, Input>
     %1 = spv.Load "Input" %0 : f32
+    %2 = spv.mlir.addressof @var1 : !spv.ptr<!spv.sampled_image<!spv.image<f32, Dim2D, IsDepth, Arrayed, SingleSampled, NeedSampler, Unknown>>, UniformConstant>
+    // CHECK: spv.Load "UniformConstant" {{%.*}} : !spv.sampled_image
+    %3 = spv.Load "UniformConstant" %2 : !spv.sampled_image<!spv.image<f32, Dim2D, IsDepth, Arrayed, SingleSampled, NeedSampler, Unknown>>
     spv.Return
   }
 }