[Mlir-commits] [mlir] eaf22ba - [MLIR] Provide lowering of std switch to llvm switch
William S. Moses
llvmlistbot at llvm.org
Wed Jul 7 12:26:45 PDT 2021
Author: William S. Moses
Date: 2021-07-07T15:25:55-04:00
New Revision: eaf22ba0118a70c04ea866441207f54fb93e804a
URL: https://github.com/llvm/llvm-project/commit/eaf22ba0118a70c04ea866441207f54fb93e804a
DIFF: https://github.com/llvm/llvm-project/commit/eaf22ba0118a70c04ea866441207f54fb93e804a.diff
LOG: [MLIR] Provide lowering of std switch to llvm switch
This patch allows lowering of std switch to llvm switch
Differential Revision: https://reviews.llvm.org/D105580
Added:
Modified:
mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
mlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
Removed:
################################################################################
diff --git a/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp b/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
index 0f91d76689393..f094f6443b156 100644
--- a/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
+++ b/mlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp
@@ -2389,6 +2389,10 @@ struct CondBranchOpLowering
: public OneToOneLLVMTerminatorLowering<CondBranchOp, LLVM::CondBrOp> {
using Super::Super;
};
+struct SwitchOpLowering
+ : public OneToOneLLVMTerminatorLowering<SwitchOp, LLVM::SwitchOp> {
+ using Super::Super;
+};
// The Splat operation is lowered to an insertelement + a shufflevector
// operation. Splat to only 1-d vector result types are lowered.
@@ -3076,6 +3080,7 @@ void mlir::populateStdToLLVMNonMemoryConversionPatterns(
SqrtOpLowering,
SubFOpLowering,
SubIOpLowering,
+ SwitchOpLowering,
TruncateIOpLowering,
UIToFPOpLowering,
UnsignedDivIOpLowering,
diff --git a/mlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir b/mlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
index 78a03372904db..ab74d125e93a1 100644
--- a/mlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
+++ b/mlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
@@ -1432,3 +1432,24 @@ func @dim_of_unranked(%unranked: memref<*xi32>) -> index {
// CHECK32: %[[SIZE:.*]] = llvm.load %{{.*}} : !llvm.ptr<i32>
// CHECK32-NEXT: llvm.return %[[SIZE]] : i32
+
+// -----
+
+func @switchLower(%arg0: i32, %arg1 : i32, %arg2 : i32) -> i32 {
+ switch %arg0 : i32, [
+ default: ^bb2,
+ 115: ^bb1
+ ]
+ ^bb1:
+ llvm.return %arg1 : i32
+ ^bb2:
+ llvm.return %arg2 : i32
+}
+
+// CHECK: llvm.switch %arg0, ^[[bb2:.+]] [
+// CHECK-NEXT: 115: ^[[bb1:.+]]
+// CHECK-NEXT: ]
+// CHECK: ^[[bb1]]:
+// CHECK: llvm.return %arg1 : i32
+// CHECK: ^[[bb2]]:
+// CHECK: llvm.return %arg2 : i32
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