[Mlir-commits] [mlir] 8cf14b8 - [mlir][Linalg] Retire hoistViewAllocOps.
Nicolas Vasilache
llvmlistbot at llvm.org
Tue Feb 23 03:45:41 PST 2021
Author: Nicolas Vasilache
Date: 2021-02-23T11:45:19Z
New Revision: 8cf14b8deca1a52d4788b34e854877e37d4f96e1
URL: https://github.com/llvm/llvm-project/commit/8cf14b8deca1a52d4788b34e854877e37d4f96e1
DIFF: https://github.com/llvm/llvm-project/commit/8cf14b8deca1a52d4788b34e854877e37d4f96e1.diff
LOG: [mlir][Linalg] Retire hoistViewAllocOps.
This transformation was only used for quick experimentation and is not general enough.
Retire it.
Differential Revision: https://reviews.llvm.org/D97266
Added:
Modified:
mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h
mlir/lib/Dialect/Linalg/Transforms/CodegenStrategy.cpp
mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
mlir/test/Dialect/Linalg/hoisting.mlir
mlir/test/lib/Transforms/TestConvVectorization.cpp
mlir/test/lib/Transforms/TestLinalgHoisting.cpp
Removed:
################################################################################
diff --git a/mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h b/mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h
index de604c972dca..fdbb8ca47606 100644
--- a/mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h
+++ b/mlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h
@@ -16,13 +16,6 @@ struct LogicalResult;
namespace linalg {
class PadTensorOp;
-/// Hoist alloc/dealloc pairs and alloca op out of immediately enclosing
-/// scf::ForOp if both conditions are true:
-/// 1. All operands are defined outside the loop.
-/// 2. All uses are ViewLikeOp or DeallocOp.
-// TODO: generalize on a per-need basis.
-void hoistViewAllocOps(FuncOp func);
-
/// Hoist vector.transfer_read/vector.transfer_write on buffers pairs out of
/// immediately enclosing scf::ForOp iteratively, if the following conditions
/// are true:
diff --git a/mlir/lib/Dialect/Linalg/Transforms/CodegenStrategy.cpp b/mlir/lib/Dialect/Linalg/Transforms/CodegenStrategy.cpp
index 6a6517bf40c7..c35d288e44d1 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/CodegenStrategy.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/CodegenStrategy.cpp
@@ -61,7 +61,6 @@ void mlir::linalg::CodegenStrategy::transform(FuncOp func) const {
});
}
promoteSingleIterationLoops(cast<FuncOp>(op));
- hoistViewAllocOps(cast<FuncOp>(op));
if (lateCodegenStrategyOptions.enableHoistRedundantVectorTransfers)
hoistRedundantVectorTransfers(cast<FuncOp>(op));
if (lateCodegenStrategyOptions.enableHoistRedundantVectorTransfersOnTensor)
diff --git a/mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp b/mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
index a0cb80fe3032..07e25e28c366 100644
--- a/mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
+++ b/mlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
@@ -35,53 +35,6 @@ using llvm::dbgs;
using namespace mlir;
using namespace mlir::linalg;
-void mlir::linalg::hoistViewAllocOps(FuncOp func) {
- bool changed = true;
- while (changed) {
- changed = false;
- func.walk([&changed](Operation *op) {
- if (!isa<AllocOp, AllocaOp, DeallocOp>(op))
- return;
-
- LLVM_DEBUG(DBGS() << "Candidate for hoisting: " << *op << "\n");
- auto loop = dyn_cast<scf::ForOp>(op->getParentOp());
- LLVM_DEBUG(DBGS() << "Parent op: " << *op->getParentOp() << "\n");
-
- // Only hoist out of immediately enclosing scf::ForOp.
- if (!loop)
- return;
-
- // If any operand is defined inside the loop don't hoist.
- if (llvm::any_of(op->getOperands(), [&](Value v) {
- return !loop.isDefinedOutsideOfLoop(v);
- }))
- return;
-
- LLVM_DEBUG(DBGS() << "All operands defined outside \n");
-
- // If alloc has other uses than ViewLikeOp and DeallocOp don't hoist.
- Value v;
- if (op->getNumResults() > 0) {
- assert(op->getNumResults() == 1 && "Unexpected multi-result alloc");
- v = op->getResult(0);
- }
- if (v && !llvm::all_of(v.getUses(), [&](OpOperand &operand) {
- return isa<ViewLikeOpInterface, DeallocOp>(operand.getOwner());
- })) {
- LLVM_DEBUG(DBGS() << "Found non view-like or dealloc use: bail\n");
- return;
- }
-
- // Move AllocOp before the loop.
- if (isa<AllocOp, AllocaOp>(op))
- (void)loop.moveOutOfLoop({op});
- else // Move DeallocOp outside of the loop.
- op->moveAfter(loop);
- changed = true;
- });
- }
-}
-
namespace {
/// Represents a unit of hoistable TransferWriteOp. This may comprise other
/// instructions that need to be hoisted too.
diff --git a/mlir/test/Dialect/Linalg/hoisting.mlir b/mlir/test/Dialect/Linalg/hoisting.mlir
index 540d1734dd63..302665ab3184 100644
--- a/mlir/test/Dialect/Linalg/hoisting.mlir
+++ b/mlir/test/Dialect/Linalg/hoisting.mlir
@@ -1,103 +1,17 @@
-// RUN: mlir-opt %s -test-linalg-hoisting=test-hoist-view-allocs -allow-unregistered-dialect -split-input-file | FileCheck %s
-// RUN: mlir-opt %s -test-linalg-hoisting=test-hoist-redundant-transfers -allow-unregistered-dialect -split-input-file | FileCheck %s --check-prefix=VECTOR_TRANSFERS
-
-// -----
-
-// CHECK-LABEL: func @hoist_allocs(
+// RUN: mlir-opt %s -test-linalg-hoisting=test-hoist-redundant-transfers -allow-unregistered-dialect -split-input-file | FileCheck %s
+
+// CHECK-LABEL: func @hoist_vector_transfer_pairs(
+// CHECK-SAME: %[[MEMREF0:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[MEMREF1:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[MEMREF2:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[MEMREF3:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[MEMREF4:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[MEMREF5:[a-zA-Z0-9]*]]: memref<?x?xf32>,
// CHECK-SAME: %[[VAL:[a-zA-Z0-9]*]]: index,
// CHECK-SAME: %[[LB:[a-zA-Z0-9]*]]: index,
// CHECK-SAME: %[[UB:[a-zA-Z0-9]*]]: index,
// CHECK-SAME: %[[STEP:[a-zA-Z0-9]*]]: index,
// CHECK-SAME: %[[CMP:[a-zA-Z0-9]*]]: i1
-func @hoist_allocs(%val: index, %lb : index, %ub : index, %step: index, %cmp: i1) {
-// CHECK-DAG: alloca(%[[VAL]]) : memref<?xi8>
-// CHECK-DAG: %[[A0:.*]] = alloc(%[[VAL]]) : memref<?xi8>
-// CHECK: scf.for %[[I:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] {
-// CHECK: alloca(%[[I]]) : memref<?xi8>
-// CHECK: %[[A1:.*]] = alloc(%[[I]]) : memref<?xi8>
-// CHECK: scf.for %[[J:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] {
-// CHECK-DAG: alloca(%[[J]]) : memref<?xi8>
-// CHECK-DAG: %[[A2:.*]] = alloc(%[[J]]) : memref<?xi8>
-// CHECK: scf.for %[[K:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] {
- scf.for %i = %lb to %ub step %step {
- scf.for %j = %lb to %ub step %step {
- scf.for %k = %lb to %ub step %step {
- // Hoist allocs / deallocs outermost, keep view/subview below k.
- %sa0 = alloca(%val) : memref<? x i8>
- %a0 = alloc(%val) : memref<? x i8>
-// CHECK: std.view %[[A0]][%[[LB]]][] : memref<?xi8> to memref<16xf32>
-// CHECK: subview %[[A0]][0] [42] [1] : memref<?xi8> to memref<42xi8>
- %v0 = view %a0[%lb][] : memref<? x i8> to memref<16 x f32>
- %sv0 = subview %a0[0][42][1] : memref<? x i8> to memref<42 x i8>
- dealloc %a0 : memref<? x i8>
-
- // Hoist below i.
- %sa1 = alloca(%i) : memref<? x i8>
- %a1 = alloc(%i) : memref<? x i8>
- dealloc %a1 : memref<? x i8>
-
- // Hoist below j.
- %sa2 = alloca(%j) : memref<? x i8>
- %a2 = alloc(%j) : memref<? x i8>
- dealloc %a2 : memref<? x i8>
-
- // Don't hoist since k innermost.
-// CHECK: alloca(%[[K]]) : memref<?xi8>
-// CHECK: %[[A3:.*]] = alloc(%[[K]]) : memref<?xi8>
-// CHECK: dealloc %[[A3]] : memref<?xi8>
- %sa3 = alloca(%k) : memref<? x i8>
- %a3 = alloc(%k) : memref<? x i8>
- dealloc %a3 : memref<? x i8>
-
- // No hoisting due to control flow.
-// CHECK: scf.if %[[CMP]] {
-// CHECK: alloca(%[[VAL]]) : memref<?xi8>
-// CHECK: %[[A4:.*]] = alloc(%[[VAL]]) : memref<?xi8>
-// CHECK: dealloc %[[A4]] : memref<?xi8>
- scf.if %cmp {
- %sa4 = alloca(%val) : memref<? x i8>
- %a4 = alloc(%val) : memref<? x i8>
- dealloc %a4 : memref<? x i8>
- }
-
- // No hoisting due to load/store.
-// CHECK: %[[SA5:.*]] = alloca(%[[VAL]]) : memref<?xi8>
-// CHECK: %[[A5:.*]] = alloc(%[[VAL]]) : memref<?xi8>
-// CHECK: load %[[A5]][%[[LB]]] : memref<?xi8>
-// CHECK: store %{{.*}}, %[[SA5]][%[[LB]]] : memref<?xi8>
-// CHECK: dealloc %[[A5]] : memref<?xi8>
- %sa5 = alloca(%val) : memref<? x i8>
- %a5 = alloc(%val) : memref<? x i8>
- %v5 = load %a5[%lb] : memref<? x i8>
- store %v5, %sa5[%lb] : memref<? x i8>
- dealloc %a5 : memref<? x i8>
-
- }
- }
- }
-// CHECK: }
-// CHECK: dealloc %[[A2]] : memref<?xi8>
-// CHECK: }
-// CHECK: dealloc %[[A1]] : memref<?xi8>
-// CHECK: }
-// CHECK: dealloc %[[A0]] : memref<?xi8>
- return
-}
-
-// -----
-
-// VECTOR_TRANSFERS-LABEL: func @hoist_vector_transfer_pairs(
-// VECTOR_TRANSFERS-SAME: %[[MEMREF0:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[MEMREF1:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[MEMREF2:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[MEMREF3:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[MEMREF4:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[MEMREF5:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[VAL:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[LB:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[UB:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[STEP:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[CMP:[a-zA-Z0-9]*]]: i1
func @hoist_vector_transfer_pairs(
%memref0: memref<?x?xf32>, %memref1: memref<?x?xf32>, %memref2: memref<?x?xf32>,
%memref3: memref<?x?xf32>, %memref4: memref<?x?xf32>, %memref5: memref<?x?xf32>,
@@ -105,29 +19,29 @@ func @hoist_vector_transfer_pairs(
%c0 = constant 0 : index
%cst = constant 0.0 : f32
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<1xf32>
-// VECTOR_TRANSFERS: scf.for %[[I:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] iter_args({{.*}}) -> (vector<1xf32>) {
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<2xf32>
-// VECTOR_TRANSFERS: scf.for %[[J:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] iter_args({{.*}}) -> (vector<1xf32>, vector<2xf32>) {
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<3xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: "some_crippling_use"(%[[MEMREF4]]) : (memref<?x?xf32>) -> ()
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<5xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<1xf32>) -> vector<1xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%[[MEMREF2]]) : (memref<?x?xf32>) -> vector<3xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<5xf32>) -> vector<5xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<3xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<4xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<5xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: "some_crippling_use"(%[[MEMREF3]]) : (memref<?x?xf32>) -> ()
-// VECTOR_TRANSFERS: scf.yield {{.*}} : vector<1xf32>, vector<2xf32>
-// VECTOR_TRANSFERS: }
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<2xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: scf.yield {{.*}} : vector<1xf32>
-// VECTOR_TRANSFERS: }
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<1xf32>, memref<?x?xf32>
+// CHECK: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<1xf32>
+// CHECK: scf.for %[[I:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] iter_args({{.*}}) -> (vector<1xf32>) {
+// CHECK: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<2xf32>
+// CHECK: scf.for %[[J:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] iter_args({{.*}}) -> (vector<1xf32>, vector<2xf32>) {
+// CHECK: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<3xf32>
+// CHECK: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<4xf32>
+// CHECK: "some_crippling_use"(%[[MEMREF4]]) : (memref<?x?xf32>) -> ()
+// CHECK: vector.transfer_read %{{.*}} : memref<?x?xf32>, vector<5xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<1xf32>) -> vector<1xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: "some_use"(%[[MEMREF2]]) : (memref<?x?xf32>) -> vector<3xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<5xf32>) -> vector<5xf32>
+// CHECK: vector.transfer_write %{{.*}} : vector<3xf32>, memref<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}} : vector<4xf32>, memref<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}} : vector<5xf32>, memref<?x?xf32>
+// CHECK: "some_crippling_use"(%[[MEMREF3]]) : (memref<?x?xf32>) -> ()
+// CHECK: scf.yield {{.*}} : vector<1xf32>, vector<2xf32>
+// CHECK: }
+// CHECK: vector.transfer_write %{{.*}} : vector<2xf32>, memref<?x?xf32>
+// CHECK: scf.yield {{.*}} : vector<1xf32>
+// CHECK: }
+// CHECK: vector.transfer_write %{{.*}} : vector<1xf32>, memref<?x?xf32>
scf.for %i = %lb to %ub step %step {
scf.for %j = %lb to %ub step %step {
%r0 = vector.transfer_read %memref1[%c0, %c0], %cst: memref<?x?xf32>, vector<1xf32>
@@ -158,17 +72,17 @@ func @hoist_vector_transfer_pairs(
// -----
-// VECTOR_TRANSFERS-LABEL: func @hoist_vector_transfer_pairs_disjoint(
-// VECTOR_TRANSFERS-SAME: %[[MEMREF0:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[MEMREF1:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[MEMREF2:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[MEMREF3:[a-zA-Z0-9]*]]: memref<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[VAL:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[LB:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[UB:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[STEP:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[RANDOM:[a-zA-Z0-9]*]]: index,
-// VECTOR_TRANSFERS-SAME: %[[CMP:[a-zA-Z0-9]*]]: i1
+// CHECK-LABEL: func @hoist_vector_transfer_pairs_disjoint(
+// CHECK-SAME: %[[MEMREF0:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[MEMREF1:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[MEMREF2:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[MEMREF3:[a-zA-Z0-9]*]]: memref<?x?xf32>,
+// CHECK-SAME: %[[VAL:[a-zA-Z0-9]*]]: index,
+// CHECK-SAME: %[[LB:[a-zA-Z0-9]*]]: index,
+// CHECK-SAME: %[[UB:[a-zA-Z0-9]*]]: index,
+// CHECK-SAME: %[[STEP:[a-zA-Z0-9]*]]: index,
+// CHECK-SAME: %[[RANDOM:[a-zA-Z0-9]*]]: index,
+// CHECK-SAME: %[[CMP:[a-zA-Z0-9]*]]: i1
func @hoist_vector_transfer_pairs_disjoint(
%memref0: memref<?x?xf32>, %memref1: memref<?x?xf32>,
%memref2: memref<?x?xf32>, %memref3: memref<?x?xf32>, %val: index, %lb : index, %ub : index,
@@ -178,34 +92,34 @@ func @hoist_vector_transfer_pairs_disjoint(
%c3 = constant 3 : index
%cst = constant 0.0 : f32
-// VECTOR_TRANSFERS: vector.transfer_read %[[MEMREF2]]{{.*}} : memref<?x?xf32>, vector<3xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %[[MEMREF2]]{{.*}} : memref<?x?xf32>, vector<3xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %[[MEMREF3]]{{.*}} : memref<?x?xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %[[MEMREF3]]{{.*}} : memref<?x?xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: scf.for %[[I:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] iter_args({{.*}}) ->
-// VECTOR_TRANSFERS-SAME: (vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>) {
-// VECTOR_TRANSFERS: scf.for %[[J:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] iter_args({{.*}}) ->
-// VECTOR_TRANSFERS-SAME: (vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>) {
-// VECTOR_TRANSFERS: vector.transfer_read %[[MEMREF1]]{{.*}} : memref<?x?xf32>, vector<2xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %[[MEMREF1]]{{.*}} : memref<?x?xf32>, vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<3xf32>) -> vector<3xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<3xf32>) -> vector<3xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}}, %[[MEMREF1]]{{.*}} : vector<2xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}}, %[[MEMREF1]]{{.*}} : vector<2xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: scf.yield {{.*}} : vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: }
-// VECTOR_TRANSFERS: scf.yield {{.*}} : vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: }
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}}, %[[MEMREF3]]{{.*}} : vector<4xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}}, %[[MEMREF3]]{{.*}} : vector<4xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}}, %[[MEMREF2]]{{.*}} : vector<3xf32>, memref<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}}, %[[MEMREF2]]{{.*}} : vector<3xf32>, memref<?x?xf32>
+// CHECK: vector.transfer_read %[[MEMREF2]]{{.*}} : memref<?x?xf32>, vector<3xf32>
+// CHECK: vector.transfer_read %[[MEMREF2]]{{.*}} : memref<?x?xf32>, vector<3xf32>
+// CHECK: vector.transfer_read %[[MEMREF3]]{{.*}} : memref<?x?xf32>, vector<4xf32>
+// CHECK: vector.transfer_read %[[MEMREF3]]{{.*}} : memref<?x?xf32>, vector<4xf32>
+// CHECK: scf.for %[[I:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] iter_args({{.*}}) ->
+// CHECK-SAME: (vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>) {
+// CHECK: scf.for %[[J:.*]] = %[[LB]] to %[[UB]] step %[[STEP]] iter_args({{.*}}) ->
+// CHECK-SAME: (vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>) {
+// CHECK: vector.transfer_read %[[MEMREF1]]{{.*}} : memref<?x?xf32>, vector<2xf32>
+// CHECK: vector.transfer_read %[[MEMREF1]]{{.*}} : memref<?x?xf32>, vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<3xf32>) -> vector<3xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<3xf32>) -> vector<3xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: vector.transfer_write %{{.*}}, %[[MEMREF1]]{{.*}} : vector<2xf32>, memref<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}}, %[[MEMREF1]]{{.*}} : vector<2xf32>, memref<?x?xf32>
+// CHECK: scf.yield {{.*}} : vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>
+// CHECK: }
+// CHECK: scf.yield {{.*}} : vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>
+// CHECK: }
+// CHECK: vector.transfer_write %{{.*}}, %[[MEMREF3]]{{.*}} : vector<4xf32>, memref<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}}, %[[MEMREF3]]{{.*}} : vector<4xf32>, memref<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}}, %[[MEMREF2]]{{.*}} : vector<3xf32>, memref<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}}, %[[MEMREF2]]{{.*}} : vector<3xf32>, memref<?x?xf32>
scf.for %i = %lb to %ub step %step {
scf.for %j = %lb to %ub step %step {
%r00 = vector.transfer_read %memref1[%c0, %c0], %cst: memref<?x?xf32>, vector<2xf32>
@@ -239,7 +153,7 @@ func @hoist_vector_transfer_pairs_disjoint(
// -----
-// VECTOR_TRANSFERS-LABEL: func @hoist_vector_transfer_pairs_tensor
+// CHECK-LABEL: func @hoist_vector_transfer_pairs_tensor
func @hoist_vector_transfer_pairs_tensor(
%tensor0: tensor<?x?xf32>, %tensor1: tensor<?x?xf32>, %tensor2: tensor<?x?xf32>,
%tensor3: tensor<?x?xf32>, %tensor4: tensor<?x?xf32>, %tensor5: tensor<?x?xf32>,
@@ -249,32 +163,32 @@ func @hoist_vector_transfer_pairs_tensor(
%c0 = constant 0 : index
%cst = constant 0.0 : f32
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : tensor<?x?xf32>, vector<1xf32>
-// VECTOR_TRANSFERS: scf.for {{.*}} iter_args({{.*}}) ->
-// VECTOR_TRANSFERS-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, vector<1xf32>) {
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : tensor<?x?xf32>, vector<2xf32>
-// VECTOR_TRANSFERS: scf.for {{.*}} iter_args({{.*}}) ->
-// VECTOR_TRANSFERS-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, vector<2xf32>, vector<1xf32>) {
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : tensor<?x?xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: "some_crippling_use"(%{{.*}}) : (tensor<?x?xf32>) -> ()
-// VECTOR_TRANSFERS: vector.transfer_read %{{.*}} : tensor<?x?xf32>, vector<5xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<1xf32>) -> vector<1xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (tensor<?x?xf32>) -> vector<3xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<5xf32>) -> vector<5xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<3xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<4xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<5xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: "some_crippling_use"(%{{.*}}) : (tensor<?x?xf32>) -> ()
-// VECTOR_TRANSFERS: scf.yield {{.*}} :
-// VECTOR_TRANSFERS-SAME: tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, vector<2xf32>, vector<1xf32>
-// VECTOR_TRANSFERS: }
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<2xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: scf.yield {{.*}} :
-// VECTOR_TRANSFERS-SAME: tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, vector<1xf32>
-// VECTOR_TRANSFERS: }
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}} : vector<1xf32>, tensor<?x?xf32>
+// CHECK: vector.transfer_read %{{.*}} : tensor<?x?xf32>, vector<1xf32>
+// CHECK: scf.for {{.*}} iter_args({{.*}}) ->
+// CHECK-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, vector<1xf32>) {
+// CHECK: vector.transfer_read %{{.*}} : tensor<?x?xf32>, vector<2xf32>
+// CHECK: scf.for {{.*}} iter_args({{.*}}) ->
+// CHECK-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, vector<2xf32>, vector<1xf32>) {
+// CHECK: vector.transfer_read %{{.*}} : tensor<?x?xf32>, vector<4xf32>
+// CHECK: "some_crippling_use"(%{{.*}}) : (tensor<?x?xf32>) -> ()
+// CHECK: vector.transfer_read %{{.*}} : tensor<?x?xf32>, vector<5xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<1xf32>) -> vector<1xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (tensor<?x?xf32>) -> vector<3xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<5xf32>) -> vector<5xf32>
+// CHECK: vector.transfer_write %{{.*}} : vector<3xf32>, tensor<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}} : vector<4xf32>, tensor<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}} : vector<5xf32>, tensor<?x?xf32>
+// CHECK: "some_crippling_use"(%{{.*}}) : (tensor<?x?xf32>) -> ()
+// CHECK: scf.yield {{.*}} :
+// CHECK-SAME: tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, vector<2xf32>, vector<1xf32>
+// CHECK: }
+// CHECK: vector.transfer_write %{{.*}} : vector<2xf32>, tensor<?x?xf32>
+// CHECK: scf.yield {{.*}} :
+// CHECK-SAME: tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>, vector<1xf32>
+// CHECK: }
+// CHECK: vector.transfer_write %{{.*}} : vector<1xf32>, tensor<?x?xf32>
%0:6 = scf.for %i = %lb to %ub step %step
iter_args(%arg0 = %tensor0, %arg1 = %tensor1, %arg2 = %tensor2,
%arg3 = %tensor3, %arg4 = %tensor4, %arg5 = %tensor5)
@@ -320,11 +234,11 @@ func @hoist_vector_transfer_pairs_tensor(
// -----
-// VECTOR_TRANSFERS-LABEL: func @hoist_vector_transfer_pairs_disjoint_tensor(
-// VECTOR_TRANSFERS-SAME: %[[TENSOR0:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[TENSOR1:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[TENSOR2:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[TENSOR3:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-LABEL: func @hoist_vector_transfer_pairs_disjoint_tensor(
+// CHECK-SAME: %[[TENSOR0:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-SAME: %[[TENSOR1:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-SAME: %[[TENSOR2:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-SAME: %[[TENSOR3:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
func @hoist_vector_transfer_pairs_disjoint_tensor(
%tensor0: tensor<?x?xf32>, %tensor1: tensor<?x?xf32>,
%tensor2: tensor<?x?xf32>, %tensor3: tensor<?x?xf32>,
@@ -336,36 +250,36 @@ func @hoist_vector_transfer_pairs_disjoint_tensor(
%c3 = constant 3 : index
%cst = constant 0.0 : f32
-// VECTOR_TRANSFERS: vector.transfer_read %[[TENSOR2]]{{.*}} : tensor<?x?xf32>, vector<3xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %[[TENSOR2]]{{.*}} : tensor<?x?xf32>, vector<3xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %[[TENSOR3]]{{.*}} : tensor<?x?xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %[[TENSOR3]]{{.*}} : tensor<?x?xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: %[[R:.*]]:6 = scf.for {{.*}} iter_args({{.*}}) ->
-// VECTOR_TRANSFERS-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>) {
-// VECTOR_TRANSFERS: scf.for {{.*}} iter_args({{.*}}) ->
-// VECTOR_TRANSFERS-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>) {
-// VECTOR_TRANSFERS: vector.transfer_read %[[TENSOR1]]{{.*}} : tensor<?x?xf32>, vector<2xf32>
-// VECTOR_TRANSFERS: vector.transfer_read %[[TENSOR1]]{{.*}} : tensor<?x?xf32>, vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<3xf32>) -> vector<3xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<3xf32>) -> vector<3xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}}, %{{.*}}{{.*}} : vector<2xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %{{.*}}, %{{.*}}{{.*}} : vector<2xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: scf.yield {{.*}} :
-// VECTOR_TRANSFERS-SAME: tensor<?x?xf32>, tensor<?x?xf32>, vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: }
-// VECTOR_TRANSFERS: scf.yield {{.*}} :
-// VECTOR_TRANSFERS-SAME: tensor<?x?xf32>, tensor<?x?xf32>, vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>
-// VECTOR_TRANSFERS: }
-// VECTOR_TRANSFERS: %[[TENSOR4:.*]] = vector.transfer_write %[[R]]#5, %[[TENSOR3]]{{.*}} : vector<4xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %[[R]]#4, %[[TENSOR4]]{{.*}} : vector<4xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: %[[TENSOR5:.*]] = vector.transfer_write %[[R]]#3, %[[TENSOR2]]{{.*}} : vector<3xf32>, tensor<?x?xf32>
-// VECTOR_TRANSFERS: vector.transfer_write %[[R]]#2, %[[TENSOR5]]{{.*}} : vector<3xf32>, tensor<?x?xf32>
+// CHECK: vector.transfer_read %[[TENSOR2]]{{.*}} : tensor<?x?xf32>, vector<3xf32>
+// CHECK: vector.transfer_read %[[TENSOR2]]{{.*}} : tensor<?x?xf32>, vector<3xf32>
+// CHECK: vector.transfer_read %[[TENSOR3]]{{.*}} : tensor<?x?xf32>, vector<4xf32>
+// CHECK: vector.transfer_read %[[TENSOR3]]{{.*}} : tensor<?x?xf32>, vector<4xf32>
+// CHECK: %[[R:.*]]:6 = scf.for {{.*}} iter_args({{.*}}) ->
+// CHECK-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>) {
+// CHECK: scf.for {{.*}} iter_args({{.*}}) ->
+// CHECK-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>) {
+// CHECK: vector.transfer_read %[[TENSOR1]]{{.*}} : tensor<?x?xf32>, vector<2xf32>
+// CHECK: vector.transfer_read %[[TENSOR1]]{{.*}} : tensor<?x?xf32>, vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<3xf32>) -> vector<3xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<3xf32>) -> vector<3xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<4xf32>) -> vector<4xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: "some_use"(%{{.*}}) : (vector<2xf32>) -> vector<2xf32>
+// CHECK: vector.transfer_write %{{.*}}, %{{.*}}{{.*}} : vector<2xf32>, tensor<?x?xf32>
+// CHECK: vector.transfer_write %{{.*}}, %{{.*}}{{.*}} : vector<2xf32>, tensor<?x?xf32>
+// CHECK: scf.yield {{.*}} :
+// CHECK-SAME: tensor<?x?xf32>, tensor<?x?xf32>, vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>
+// CHECK: }
+// CHECK: scf.yield {{.*}} :
+// CHECK-SAME: tensor<?x?xf32>, tensor<?x?xf32>, vector<3xf32>, vector<3xf32>, vector<4xf32>, vector<4xf32>
+// CHECK: }
+// CHECK: %[[TENSOR4:.*]] = vector.transfer_write %[[R]]#5, %[[TENSOR3]]{{.*}} : vector<4xf32>, tensor<?x?xf32>
+// CHECK: vector.transfer_write %[[R]]#4, %[[TENSOR4]]{{.*}} : vector<4xf32>, tensor<?x?xf32>
+// CHECK: %[[TENSOR5:.*]] = vector.transfer_write %[[R]]#3, %[[TENSOR2]]{{.*}} : vector<3xf32>, tensor<?x?xf32>
+// CHECK: vector.transfer_write %[[R]]#2, %[[TENSOR5]]{{.*}} : vector<3xf32>, tensor<?x?xf32>
%0:4 = scf.for %i = %lb to %ub step %step
iter_args(%arg0 = %tensor0, %arg1 = %tensor1, %arg2 = %tensor2,
%arg3 = %tensor3)
@@ -407,13 +321,13 @@ func @hoist_vector_transfer_pairs_disjoint_tensor(
// -----
-// VECTOR_TRANSFERS-LABEL: func @hoist_vector_transfer_pairs_tensor_and_subtensors
-// VECTOR_TRANSFERS-SAME: %[[TENSOR0:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[TENSOR1:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[TENSOR2:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[TENSOR3:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[TENSOR4:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
-// VECTOR_TRANSFERS-SAME: %[[TENSOR5:[a-zA-Z0-9]*]]: tensor<?x?xf32>
+// CHECK-LABEL: func @hoist_vector_transfer_pairs_tensor_and_subtensors
+// CHECK-SAME: %[[TENSOR0:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-SAME: %[[TENSOR1:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-SAME: %[[TENSOR2:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-SAME: %[[TENSOR3:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-SAME: %[[TENSOR4:[a-zA-Z0-9]*]]: tensor<?x?xf32>,
+// CHECK-SAME: %[[TENSOR5:[a-zA-Z0-9]*]]: tensor<?x?xf32>
func @hoist_vector_transfer_pairs_tensor_and_subtensors(
%tensor0: tensor<?x?xf32>, %tensor1: tensor<?x?xf32>, %tensor2: tensor<?x?xf32>,
%tensor3: tensor<?x?xf32>, %tensor4: tensor<?x?xf32>, %tensor5: tensor<?x?xf32>,
@@ -424,26 +338,26 @@ func @hoist_vector_transfer_pairs_tensor_and_subtensors(
%c0 = constant 0 : index
%cst = constant 0.0 : f32
- // VECTOR_TRANSFERS: scf.for %[[I:.*]] = {{.*}} iter_args(
- // VECTOR_TRANSFERS-SAME: %[[TENSOR0_ARG:[0-9a-zA-Z]+]] = %[[TENSOR0]],
- // VECTOR_TRANSFERS-SAME: %[[TENSOR1_ARG:[0-9a-zA-Z]+]] = %[[TENSOR1]],
- // VECTOR_TRANSFERS-SAME: %[[TENSOR2_ARG:[0-9a-zA-Z]+]] = %[[TENSOR2]]
- // VECTOR_TRANSFERS-SAME: ) ->
- // VECTOR_TRANSFERS-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>
+ // CHECK: scf.for %[[I:.*]] = {{.*}} iter_args(
+ // CHECK-SAME: %[[TENSOR0_ARG:[0-9a-zA-Z]+]] = %[[TENSOR0]],
+ // CHECK-SAME: %[[TENSOR1_ARG:[0-9a-zA-Z]+]] = %[[TENSOR1]],
+ // CHECK-SAME: %[[TENSOR2_ARG:[0-9a-zA-Z]+]] = %[[TENSOR2]]
+ // CHECK-SAME: ) ->
+ // CHECK-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>
%0:3 = scf.for %i = %lb to %ub step %step
iter_args(%arg0 = %tensor0, %arg1 = %tensor1, %arg2 = %tensor2)
-> (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>) {
// Hoisted
- // VECTOR_TRANSFERS: %[[ST0:.*]] = subtensor %[[TENSOR0_ARG]][%[[I]], %[[I]]]{{.*}}: tensor<?x?xf32> to tensor<?x?xf32>
- // VECTOR_TRANSFERS: %[[V0:.*]] = vector.transfer_read %[[ST0]]{{.*}} : tensor<?x?xf32>, vector<1xf32>
-
- // VECTOR_TRANSFERS: %[[R:.*]]:3 = scf.for %[[J:.*]] = {{.*}} iter_args(
- // VECTOR_TRANSFERS-SAME: %[[TENSOR1_ARG_L2:[0-9a-zA-Z]+]] = %[[TENSOR1_ARG]]
- // VECTOR_TRANSFERS-SAME: %[[TENSOR2_ARG_L2:[0-9a-zA-Z]+]] = %[[TENSOR2_ARG]]
- // VECTOR_TRANSFERS-SAME: %[[V0_ARG_L2:[0-9a-zA-Z]+]] = %[[V0]]
- // VECTOR_TRANSFERS-SAME: ) ->
- // VECTOR_TRANSFERS-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, vector<1xf32>
+ // CHECK: %[[ST0:.*]] = subtensor %[[TENSOR0_ARG]][%[[I]], %[[I]]]{{.*}}: tensor<?x?xf32> to tensor<?x?xf32>
+ // CHECK: %[[V0:.*]] = vector.transfer_read %[[ST0]]{{.*}} : tensor<?x?xf32>, vector<1xf32>
+
+ // CHECK: %[[R:.*]]:3 = scf.for %[[J:.*]] = {{.*}} iter_args(
+ // CHECK-SAME: %[[TENSOR1_ARG_L2:[0-9a-zA-Z]+]] = %[[TENSOR1_ARG]]
+ // CHECK-SAME: %[[TENSOR2_ARG_L2:[0-9a-zA-Z]+]] = %[[TENSOR2_ARG]]
+ // CHECK-SAME: %[[V0_ARG_L2:[0-9a-zA-Z]+]] = %[[V0]]
+ // CHECK-SAME: ) ->
+ // CHECK-SAME: (tensor<?x?xf32>, tensor<?x?xf32>, vector<1xf32>
%1:3 = scf.for %j = %lb to %ub step %step
iter_args(%arg6 = %arg0, %arg7 = %arg1, %arg8 = %arg2)
-> (tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>) {
@@ -451,21 +365,21 @@ func @hoist_vector_transfer_pairs_tensor_and_subtensors(
%st0 = subtensor %arg6[%i, %i][%step, %step][1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
%r0 = vector.transfer_read %st0[%c0, %c0], %cst: tensor<?x?xf32>, vector<1xf32>
- // VECTOR_TRANSFERS: %[[ST1:.*]] = subtensor %[[TENSOR1_ARG_L2]][%[[J]],{{.*}}: tensor<?x?xf32> to tensor<?x?xf32>
- // VECTOR_TRANSFERS: %[[V1:.*]] = vector.transfer_read %[[ST1]]{{.*}} : tensor<?x?xf32>, vector<2xf32>
+ // CHECK: %[[ST1:.*]] = subtensor %[[TENSOR1_ARG_L2]][%[[J]],{{.*}}: tensor<?x?xf32> to tensor<?x?xf32>
+ // CHECK: %[[V1:.*]] = vector.transfer_read %[[ST1]]{{.*}} : tensor<?x?xf32>, vector<2xf32>
// Does not hoist (subtensor depends on %j)
%st1 = subtensor %arg7[%j, %c0][%step, %step][1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
%r1 = vector.transfer_read %st1[%c0, %c0], %cst: tensor<?x?xf32>, vector<2xf32>
- // VECTOR_TRANSFERS: %[[ST2:.*]] = subtensor %[[TENSOR2_ARG_L2]][%[[I]],{{.*}}: tensor<?x?xf32> to tensor<?x?xf32>
- // VECTOR_TRANSFERS: %[[V2:.*]] = vector.transfer_read %[[ST2]]{{.*}} : tensor<?x?xf32>, vector<3xf32>
+ // CHECK: %[[ST2:.*]] = subtensor %[[TENSOR2_ARG_L2]][%[[I]],{{.*}}: tensor<?x?xf32> to tensor<?x?xf32>
+ // CHECK: %[[V2:.*]] = vector.transfer_read %[[ST2]]{{.*}} : tensor<?x?xf32>, vector<3xf32>
// Does not hoist, 2 subtensor %arg8.
%st2 = subtensor %arg8[%i, %c0][%step, %step][1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
%r2 = vector.transfer_read %st2[%c0, %c0], %cst: tensor<?x?xf32>, vector<3xf32>
- // VECTOR_TRANSFERS: %[[U0:.*]] = "some_use"(%[[V0_ARG_L2]]) : (vector<1xf32>) -> vector<1xf32>
- // VECTOR_TRANSFERS: %[[U1:.*]] = "some_use"(%[[V1]]) : (vector<2xf32>) -> vector<2xf32>
- // VECTOR_TRANSFERS: %[[U2:.*]] = "some_use"(%[[V2]]) : (vector<3xf32>) -> vector<3xf32>
+ // CHECK: %[[U0:.*]] = "some_use"(%[[V0_ARG_L2]]) : (vector<1xf32>) -> vector<1xf32>
+ // CHECK: %[[U1:.*]] = "some_use"(%[[V1]]) : (vector<2xf32>) -> vector<2xf32>
+ // CHECK: %[[U2:.*]] = "some_use"(%[[V2]]) : (vector<3xf32>) -> vector<3xf32>
%u0 = "some_use"(%r0) : (vector<1xf32>) -> vector<1xf32>
%u1 = "some_use"(%r1) : (vector<2xf32>) -> vector<2xf32>
%u2 = "some_use"(%r2) : (vector<3xf32>) -> vector<3xf32>
@@ -473,42 +387,42 @@ func @hoist_vector_transfer_pairs_tensor_and_subtensors(
// Hoists
%w0 = vector.transfer_write %u0, %st0[%c0, %c0] : vector<1xf32>, tensor<?x?xf32>
- // VECTOR_TRANSFERS-DAG: %[[STI1:.*]] = vector.transfer_write %[[U1]], %{{.*}} : vector<2xf32>, tensor<?x?xf32>
+ // CHECK-DAG: %[[STI1:.*]] = vector.transfer_write %[[U1]], %{{.*}} : vector<2xf32>, tensor<?x?xf32>
// Does not hoist (associated subtensor depends on %j).
%w1 = vector.transfer_write %u1, %st1[%i, %i] : vector<2xf32>, tensor<?x?xf32>
- // VECTOR_TRANSFERS-DAG: %[[STI2:.*]] = vector.transfer_write %[[U2]], %{{.*}} : vector<3xf32>, tensor<?x?xf32>
+ // CHECK-DAG: %[[STI2:.*]] = vector.transfer_write %[[U2]], %{{.*}} : vector<3xf32>, tensor<?x?xf32>
// Does not hoist, 2 subtensor / subtensor_insert for %arg8.
%w2 = vector.transfer_write %u2, %st2[%c0, %c0] : vector<3xf32>, tensor<?x?xf32>
// Hoists.
%sti0 = subtensor_insert %w0 into %arg6[%i, %i][%step, %step][1, 1] : tensor<?x?xf32> into tensor<?x?xf32>
- // VECTOR_TRANSFERS-DAG: subtensor_insert %[[STI1]] into %[[TENSOR1_ARG_L2]][%[[J]],{{.*}}: tensor<?x?xf32> into tensor<?x?xf32>
+ // CHECK-DAG: subtensor_insert %[[STI1]] into %[[TENSOR1_ARG_L2]][%[[J]],{{.*}}: tensor<?x?xf32> into tensor<?x?xf32>
// Does not hoist (depends on %j).
%sti1 = subtensor_insert %w1 into %arg7[%j, %c0][%step, %step][1, 1] : tensor<?x?xf32> into tensor<?x?xf32>
- // VECTOR_TRANSFERS-DAG: subtensor_insert %[[STI2]] into %[[TENSOR2_ARG_L2]][%[[I]],{{.*}}: tensor<?x?xf32> into tensor<?x?xf32>
+ // CHECK-DAG: subtensor_insert %[[STI2]] into %[[TENSOR2_ARG_L2]][%[[I]],{{.*}}: tensor<?x?xf32> into tensor<?x?xf32>
// Does not hoist, 2 subtensor / subtensor_insert for %arg8.
%sti2 = subtensor_insert %w2 into %arg8[%i, %c0][%step, %step][1, 1] : tensor<?x?xf32> into tensor<?x?xf32>
%st22 = subtensor %sti2[%i, %c0][%step, %step][1, 1] : tensor<?x?xf32> to tensor<?x?xf32>
%sti22 = subtensor_insert %st22 into %arg8[%i, %c0][%step, %step][1, 1] : tensor<?x?xf32> into tensor<?x?xf32>
- // VECTOR_TRANSFERS: scf.yield {{.*}} : tensor<?x?xf32>, tensor<?x?xf32>, vector<1xf32>
- // VECTOR_TRANSFERS: }
+ // CHECK: scf.yield {{.*}} : tensor<?x?xf32>, tensor<?x?xf32>, vector<1xf32>
+ // CHECK: }
scf.yield %sti0, %sti1, %sti22:
tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>
}
// Hoisted
- // VECTOR_TRANSFERS: %[[STI0:.*]] = vector.transfer_write %[[R]]#2, %[[ST0]]{{.*}} : vector<1xf32>, tensor<?x?xf32>
- // VECTOR_TRANSFERS: subtensor_insert %[[STI0]] into %[[TENSOR0_ARG]][%[[I]], %[[I]]]{{.*}} : tensor<?x?xf32> into tensor<?x?xf32>
+ // CHECK: %[[STI0:.*]] = vector.transfer_write %[[R]]#2, %[[ST0]]{{.*}} : vector<1xf32>, tensor<?x?xf32>
+ // CHECK: subtensor_insert %[[STI0]] into %[[TENSOR0_ARG]][%[[I]], %[[I]]]{{.*}} : tensor<?x?xf32> into tensor<?x?xf32>
- // VECTOR_TRANSFERS: scf.yield {{.*}} : tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>
+ // CHECK: scf.yield {{.*}} : tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>
scf.yield %1#0, %1#1, %1#2 :
tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>
- // VECTOR_TRANSFERS: }
+ // CHECK: }
}
return %0#0, %0#1, %0#2 : tensor<?x?xf32>, tensor<?x?xf32>, tensor<?x?xf32>
}
diff --git a/mlir/test/lib/Transforms/TestConvVectorization.cpp b/mlir/test/lib/Transforms/TestConvVectorization.cpp
index 3b07465aadb8..61ede8197cff 100644
--- a/mlir/test/lib/Transforms/TestConvVectorization.cpp
+++ b/mlir/test/lib/Transforms/TestConvVectorization.cpp
@@ -74,7 +74,6 @@ void TestConvVectorization::runOnOperation() {
llvm_unreachable("Unexpected failure in cleanup pass pipeline.");
op->walk([](FuncOp func) {
promoteSingleIterationLoops(func);
- linalg::hoistViewAllocOps(func);
linalg::hoistRedundantVectorTransfers(func);
});
return success();
diff --git a/mlir/test/lib/Transforms/TestLinalgHoisting.cpp b/mlir/test/lib/Transforms/TestLinalgHoisting.cpp
index 76d41f1fcdc4..d3f9c299a8dd 100644
--- a/mlir/test/lib/Transforms/TestLinalgHoisting.cpp
+++ b/mlir/test/lib/Transforms/TestLinalgHoisting.cpp
@@ -29,10 +29,6 @@ struct TestLinalgHoisting
void runOnFunction() override;
- Option<bool> testHoistViewAllocs{
- *this, "test-hoist-view-allocs",
- llvm::cl::desc("Test hoisting alloc used by view"),
- llvm::cl::init(false)};
Option<bool> testHoistRedundantTransfers{
*this, "test-hoist-redundant-transfers",
llvm::cl::desc("Test hoisting transfer_read/transfer_write pairs"),
@@ -41,10 +37,6 @@ struct TestLinalgHoisting
} // end anonymous namespace
void TestLinalgHoisting::runOnFunction() {
- if (testHoistViewAllocs) {
- hoistViewAllocOps(getFunction());
- return;
- }
if (testHoistRedundantTransfers) {
hoistRedundantVectorTransfers(getFunction());
hoistRedundantVectorTransfersOnTensor(getFunction());
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