[Mlir-commits] [mlir] 9a64a5f - [mlir][Standard][NFC] Fix op documentation

[River Riddle]

Author: Javier Setoain
Date: 2021-04-20T10:48:07-07:00
New Revision: 9a64a5f72f9d0f3f6162e03c9ef88bd1a398668b

URL: https://github.com/llvm/llvm-project/commit/9a64a5f72f9d0f3f6162e03c9ef88bd1a398668b
DIFF: https://github.com/llvm/llvm-project/commit/9a64a5f72f9d0f3f6162e03c9ef88bd1a398668b.diff

LOG: [mlir][Standard][NFC] Fix op documentation

A couple of standard op examples that use an outdated syntax need an
update.

Differential Revision: https://reviews.llvm.org/D100840

Added: 
    

Modified: 
    mlir/include/mlir/Dialect/StandardOps/IR/Ops.td

Removed: 
    


################################################################################
diff  --git a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
index 060062e30fb6..aaa5a8a7256c 100644
--- a/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
+++ b/mlir/include/mlir/Dialect/StandardOps/IR/Ops.td
@@ -1541,13 +1541,13 @@ def SignedDivIOp : IntBinaryOp<"divi_signed"> {
 
     ```mlir
     // Scalar signed integer division.
-    %a = divis %b, %c : i64
+    %a = divi_signed %b, %c : i64
 
     // SIMD vector element-wise division.
-    %f = divis %g, %h : vector<4xi32>
+    %f = divi_signed %g, %h : vector<4xi32>
 
     // Tensor element-wise integer division.
-    %x = divis %y, %z : tensor<4x?xi8>
+    %x = divi_signed %y, %z : tensor<4x?xi8>
     ```
   }];
   let hasFolder = 1;
@@ -1633,13 +1633,13 @@ def SignedRemIOp : IntBinaryOp<"remi_signed"> {
 
     ```mlir
     // Scalar signed integer division remainder.
-    %a = remis %b, %c : i64
+    %a = remi_signed %b, %c : i64
 
     // SIMD vector element-wise division remainder.
-    %f = remis %g, %h : vector<4xi32>
+    %f = remi_signed %g, %h : vector<4xi32>
 
     // Tensor element-wise integer division remainder.
-    %x = remis %y, %z : tensor<4x?xi8>
+    %x = remi_signed %y, %z : tensor<4x?xi8>
     ```
   }];
   let hasFolder = 1;
@@ -2194,13 +2194,13 @@ def UnsignedDivIOp : IntBinaryOp<"divi_unsigned"> {
 
     ```mlir
     // Scalar unsigned integer division.
-    %a = diviu %b, %c : i64
+    %a = divi_unsigned %b, %c : i64
 
     // SIMD vector element-wise division.
-    %f = diviu %g, %h : vector<4xi32>
+    %f = divi_unsigned %g, %h : vector<4xi32>
 
     // Tensor element-wise integer division.
-    %x = diviu %y, %z : tensor<4x?xi8>
+    %x = divi_unsigned %y, %z : tensor<4x?xi8>
     ```
   }];
   let hasFolder = 1;
@@ -2229,13 +2229,13 @@ def UnsignedRemIOp : IntBinaryOp<"remi_unsigned"> {
 
     ```mlir
     // Scalar unsigned integer division remainder.
-    %a = remiu %b, %c : i64
+    %a = remi_unsigned %b, %c : i64
 
     // SIMD vector element-wise division remainder.
-    %f = remiu %g, %h : vector<4xi32>
+    %f = remi_unsigned %g, %h : vector<4xi32>
 
     // Tensor element-wise integer division remainder.
-    %x = remiu %y, %z : tensor<4x?xi8>
+    %x = remi_unsigned %y, %z : tensor<4x?xi8>
     ```
   }];
   let hasFolder = 1;