[Mlir-commits] [mlir] 8508a63 - [mlir] Rename AVX512 dialect to X86Vector
Alex Zinenko
llvmlistbot at llvm.org
Mon Apr 12 10:20:11 PDT 2021
Author: Emilio Cota
Date: 2021-04-12T19:20:04+02:00
New Revision: 8508a63b887e29d1c699f1a9cdf8b2a6164a6f0a
URL: https://github.com/llvm/llvm-project/commit/8508a63b887e29d1c699f1a9cdf8b2a6164a6f0a
DIFF: https://github.com/llvm/llvm-project/commit/8508a63b887e29d1c699f1a9cdf8b2a6164a6f0a.diff
LOG: [mlir] Rename AVX512 dialect to X86Vector
We will soon be adding non-AVX512 operations to MLIR, such as AVX's rsqrt. In https://reviews.llvm.org/D99818 several possibilities were discussed, namely to (1) add non-AVX512 ops to the AVX512 dialect, (2) add more dialects (e.g. AVX dialect for AVX rsqrt), and (3) expand the scope of the AVX512 to include these SIMD x86 ops, thereby renaming the dialect to something more accurate such as X86Vector.
Consensus was reached on option (3), which this patch implements.
Reviewed By: aartbik, ftynse, nicolasvasilache
Differential Revision: https://reviews.llvm.org/D100119
Added:
mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt
mlir/include/mlir/Dialect/X86Vector/Transforms.h
mlir/include/mlir/Dialect/X86Vector/X86Vector.td
mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
mlir/include/mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h
mlir/lib/Dialect/X86Vector/CMakeLists.txt
mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt
mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
mlir/lib/Target/LLVMIR/Dialect/X86Vector/CMakeLists.txt
mlir/lib/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.cpp
mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
mlir/test/Dialect/X86Vector/roundtrip.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
mlir/test/Target/LLVMIR/x86vector.mlir
Modified:
mlir/include/mlir/Conversion/Passes.td
mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
mlir/include/mlir/Dialect/CMakeLists.txt
mlir/include/mlir/InitAllDialects.h
mlir/include/mlir/Target/LLVMIR/Dialect/All.h
mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
mlir/lib/Dialect/CMakeLists.txt
mlir/lib/Target/LLVMIR/CMakeLists.txt
mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
mlir/test/CMakeLists.txt
mlir/test/lit.site.cfg.py.in
mlir/test/mlir-opt/commandline.mlir
Removed:
mlir/include/mlir/Dialect/AVX512/AVX512.td
mlir/include/mlir/Dialect/AVX512/AVX512Dialect.h
mlir/include/mlir/Dialect/AVX512/CMakeLists.txt
mlir/include/mlir/Dialect/AVX512/Transforms.h
mlir/include/mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h
mlir/lib/Dialect/AVX512/CMakeLists.txt
mlir/lib/Dialect/AVX512/IR/AVX512Dialect.cpp
mlir/lib/Dialect/AVX512/IR/CMakeLists.txt
mlir/lib/Dialect/AVX512/Transforms/CMakeLists.txt
mlir/lib/Dialect/AVX512/Transforms/LegalizeForLLVMExport.cpp
mlir/lib/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.cpp
mlir/lib/Target/LLVMIR/Dialect/AVX512/CMakeLists.txt
mlir/test/Dialect/AVX512/legalize-for-llvm.mlir
mlir/test/Dialect/AVX512/roundtrip.mlir
mlir/test/Integration/Dialect/Vector/CPU/AVX512/lit.local.cfg
mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-mask-compress.mlir
mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-sparse-dot-product.mlir
mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-vp2intersect-i32.mlir
mlir/test/Target/LLVMIR/avx512.mlir
################################################################################
diff --git a/mlir/include/mlir/Conversion/Passes.td b/mlir/include/mlir/Conversion/Passes.td
index a3efe9deb0dc8..d569af5235d62 100644
--- a/mlir/include/mlir/Conversion/Passes.td
+++ b/mlir/include/mlir/Conversion/Passes.td
@@ -509,7 +509,7 @@ def ConvertVectorToLLVM : Pass<"convert-vector-to-llvm", "ModuleOp"> {
operations. The lowering pass provides several options to control
the kinds of optimizations that are allowed. It also provides options
that enable the use of one or more architectural-specific dialects
- (AMX, AVX512, ArmNeon, ArmSVE, etc.) in combination with the
+ (AMX, X86Vector, ArmNeon, ArmSVE, etc.) in combination with the
architectural-neutral vector dialect lowering.
}];
@@ -528,10 +528,6 @@ def ConvertVectorToLLVM : Pass<"convert-vector-to-llvm", "ModuleOp"> {
"bool", /*default=*/"false",
"Enables the use of AMX dialect while lowering the vector "
"dialect.">,
- Option<"enableAVX512", "enable-avx512",
- "bool", /*default=*/"false",
- "Enables the use of AVX512 dialect while lowering the vector "
- "dialect.">,
Option<"enableArmNeon", "enable-arm-neon",
"bool", /*default=*/"false",
"Enables the use of ArmNeon dialect while lowering the vector "
@@ -539,7 +535,11 @@ def ConvertVectorToLLVM : Pass<"convert-vector-to-llvm", "ModuleOp"> {
Option<"enableArmSVE", "enable-arm-sve",
"bool", /*default=*/"false",
"Enables the use of ArmSVE dialect while lowering the vector "
- "dialect.">
+ "dialect.">,
+ Option<"enableX86Vector", "enable-x86vector",
+ "bool", /*default=*/"false",
+ "Enables the use of X86Vector dialect while lowering the vector "
+ "dialect.">
];
}
diff --git a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h b/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
index 0ee3fd5eb4a0e..f721870cb338b 100644
--- a/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
+++ b/mlir/include/mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h
@@ -24,7 +24,7 @@ struct LowerVectorToLLVMOptions {
LowerVectorToLLVMOptions()
: reassociateFPReductions(false), enableIndexOptimizations(true),
enableArmNeon(false), enableArmSVE(false), enableAMX(false),
- enableAVX512(false) {}
+ enableX86Vector(false) {}
LowerVectorToLLVMOptions &setReassociateFPReductions(bool b) {
reassociateFPReductions = b;
@@ -46,8 +46,8 @@ struct LowerVectorToLLVMOptions {
enableAMX = b;
return *this;
}
- LowerVectorToLLVMOptions &setEnableAVX512(bool b) {
- enableAVX512 = b;
+ LowerVectorToLLVMOptions &setEnableX86Vector(bool b) {
+ enableX86Vector = b;
return *this;
}
@@ -56,7 +56,7 @@ struct LowerVectorToLLVMOptions {
bool enableArmNeon;
bool enableArmSVE;
bool enableAMX;
- bool enableAVX512;
+ bool enableX86Vector;
};
/// Collect a set of patterns to convert from Vector contractions to LLVM Matrix
diff --git a/mlir/include/mlir/Dialect/AVX512/CMakeLists.txt b/mlir/include/mlir/Dialect/AVX512/CMakeLists.txt
deleted file mode 100644
index 07ea8817bc0b9..0000000000000
--- a/mlir/include/mlir/Dialect/AVX512/CMakeLists.txt
+++ /dev/null
@@ -1,6 +0,0 @@
-add_mlir_dialect(AVX512 avx512)
-add_mlir_doc(AVX512 -gen-dialect-doc AVX512 Dialects/)
-
-set(LLVM_TARGET_DEFINITIONS AVX512.td)
-mlir_tablegen(AVX512Conversions.inc -gen-llvmir-conversions)
-add_public_tablegen_target(MLIRAVX512ConversionsIncGen)
diff --git a/mlir/include/mlir/Dialect/AVX512/Transforms.h b/mlir/include/mlir/Dialect/AVX512/Transforms.h
deleted file mode 100644
index 0ea3e627d78ca..0000000000000
--- a/mlir/include/mlir/Dialect/AVX512/Transforms.h
+++ /dev/null
@@ -1,30 +0,0 @@
-//===- Transforms.h - AVX512 Dialect Transformation Entrypoints -*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef MLIR_DIALECT_AVX512_TRANSFORMS_H
-#define MLIR_DIALECT_AVX512_TRANSFORMS_H
-
-namespace mlir {
-
-class LLVMConversionTarget;
-class LLVMTypeConverter;
-class RewritePatternSet;
-using OwningRewritePatternList = RewritePatternSet;
-
-/// Collect a set of patterns to lower AVX512 ops to ops that map to LLVM
-/// intrinsics.
-void populateAVX512LegalizeForLLVMExportPatterns(LLVMTypeConverter &converter,
- RewritePatternSet &patterns);
-
-/// Configure the target to support lowering AVX512 ops to ops that map to LLVM
-/// intrinsics.
-void configureAVX512LegalizeForExportTarget(LLVMConversionTarget &target);
-
-} // namespace mlir
-
-#endif // MLIR_DIALECT_AVX512_TRANSFORMS_H
diff --git a/mlir/include/mlir/Dialect/CMakeLists.txt b/mlir/include/mlir/Dialect/CMakeLists.txt
index 20bccbfb29714..9b9c80baaa3cb 100644
--- a/mlir/include/mlir/Dialect/CMakeLists.txt
+++ b/mlir/include/mlir/Dialect/CMakeLists.txt
@@ -3,7 +3,6 @@ add_subdirectory(Async)
add_subdirectory(ArmNeon)
add_subdirectory(ArmSVE)
add_subdirectory(AMX)
-add_subdirectory(AVX512)
add_subdirectory(Complex)
add_subdirectory(DLTI)
add_subdirectory(GPU)
@@ -23,3 +22,4 @@ add_subdirectory(StandardOps)
add_subdirectory(Tensor)
add_subdirectory(Tosa)
add_subdirectory(Vector)
+add_subdirectory(X86Vector)
diff --git a/mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt b/mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt
new file mode 100644
index 0000000000000..faa8ae39482a6
--- /dev/null
+++ b/mlir/include/mlir/Dialect/X86Vector/CMakeLists.txt
@@ -0,0 +1,6 @@
+add_mlir_dialect(X86Vector x86vector)
+add_mlir_doc(X86Vector -gen-dialect-doc X86Vector Dialects/)
+
+set(LLVM_TARGET_DEFINITIONS X86Vector.td)
+mlir_tablegen(X86VectorConversions.inc -gen-llvmir-conversions)
+add_public_tablegen_target(MLIRX86VectorConversionsIncGen)
diff --git a/mlir/include/mlir/Dialect/X86Vector/Transforms.h b/mlir/include/mlir/Dialect/X86Vector/Transforms.h
new file mode 100644
index 0000000000000..5e55a03e9b6c6
--- /dev/null
+++ b/mlir/include/mlir/Dialect/X86Vector/Transforms.h
@@ -0,0 +1,30 @@
+//=- Transforms.h - X86Vector Dialect Transformation Entrypoints -*- C++ -*-=//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_DIALECT_X86VECTOR_TRANSFORMS_H
+#define MLIR_DIALECT_X86VECTOR_TRANSFORMS_H
+
+namespace mlir {
+
+class LLVMConversionTarget;
+class LLVMTypeConverter;
+class RewritePatternSet;
+using OwningRewritePatternList = RewritePatternSet;
+
+/// Collect a set of patterns to lower X86Vector ops to ops that map to LLVM
+/// intrinsics.
+void populateX86VectorLegalizeForLLVMExportPatterns(
+ LLVMTypeConverter &converter, RewritePatternSet &patterns);
+
+/// Configure the target to support lowering X86Vector ops to ops that map to
+/// LLVM intrinsics.
+void configureX86VectorLegalizeForExportTarget(LLVMConversionTarget &target);
+
+} // namespace mlir
+
+#endif // MLIR_DIALECT_X86VECTOR_TRANSFORMS_H
diff --git a/mlir/include/mlir/Dialect/AVX512/AVX512.td b/mlir/include/mlir/Dialect/X86Vector/X86Vector.td
similarity index 95%
rename from mlir/include/mlir/Dialect/AVX512/AVX512.td
rename to mlir/include/mlir/Dialect/X86Vector/X86Vector.td
index 0a32988d684d0..0c9aed89bc188 100644
--- a/mlir/include/mlir/Dialect/AVX512/AVX512.td
+++ b/mlir/include/mlir/Dialect/X86Vector/X86Vector.td
@@ -1,4 +1,4 @@
-//===-- AVX512Ops.td - AVX512 dialect operation definitions *- tablegen -*-===//
+//===-- X86VectorOps.td - X86Vector dialect operation defs -*- tablegen -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,23 +6,23 @@
//
//===----------------------------------------------------------------------===//
//
-// This file defines the basic operations for the AVX512 dialect.
+// This file defines the basic operations for the X86Vector dialect.
//
//===----------------------------------------------------------------------===//
-#ifndef AVX512_OPS
-#define AVX512_OPS
+#ifndef X86VECTOR_OPS
+#define X86VECTOR_OPS
include "mlir/Interfaces/SideEffectInterfaces.td"
include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
//===----------------------------------------------------------------------===//
-// AVX512 dialect definition
+// X86Vector dialect definition
//===----------------------------------------------------------------------===//
-def AVX512_Dialect : Dialect {
- let name = "avx512";
- let cppNamespace = "::mlir::avx512";
+def X86Vector_Dialect : Dialect {
+ let name = "x86vector";
+ let cppNamespace = "::mlir::x86vector";
}
//===----------------------------------------------------------------------===//
@@ -30,10 +30,10 @@ def AVX512_Dialect : Dialect {
//===----------------------------------------------------------------------===//
class AVX512_Op<string mnemonic, list<OpTrait> traits = []> :
- Op<AVX512_Dialect, mnemonic, traits> {}
+ Op<X86Vector_Dialect, "avx512." # mnemonic, traits> {}
class AVX512_IntrOp<string mnemonic, int numResults, list<OpTrait> traits = []> :
- LLVM_IntrOpBase<AVX512_Dialect, "intr." # mnemonic,
+ LLVM_IntrOpBase<X86Vector_Dialect, "avx512.intr." # mnemonic,
"x86_avx512_" # !subst(".", "_", mnemonic),
[], [], traits, numResults>;
@@ -41,7 +41,7 @@ class AVX512_IntrOp<string mnemonic, int numResults, list<OpTrait> traits = []>
// instructions in the future.
class AVX512_IntrOverloadedOp<string mnemonic,
list<OpTrait> traits = []> :
- LLVM_IntrOpBase<AVX512_Dialect, "intr." # mnemonic,
+ LLVM_IntrOpBase<X86Vector_Dialect, "avx512.intr." # mnemonic,
"x86_avx512_" # !subst(".", "_", mnemonic),
/*list<int> overloadedResults=*/[0],
/*list<int> overloadedOperands=*/[],
@@ -267,4 +267,4 @@ def Vp2IntersectQIntrOp : AVX512_IntrOp<"vp2intersect.q.512", 2, [
VectorOfLengthAndType<[8], [I64]>:$b);
}
-#endif // AVX512_OPS
+#endif // X86VECTOR_OPS
diff --git a/mlir/include/mlir/Dialect/AVX512/AVX512Dialect.h b/mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
similarity index 60%
rename from mlir/include/mlir/Dialect/AVX512/AVX512Dialect.h
rename to mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
index f14ff9afdfd8a..4c227032f9de3 100644
--- a/mlir/include/mlir/Dialect/AVX512/AVX512Dialect.h
+++ b/mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h
@@ -1,4 +1,4 @@
-//===- AVX512Dialect.h - MLIR Dialect for AVX512 ----------------*- C++ -*-===//
+//===- X86VectorDialect.h - MLIR Dialect for X86Vector ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,12 +6,12 @@
//
//===----------------------------------------------------------------------===//
//
-// This file declares the Target dialect for AVX512 in MLIR.
+// This file declares the Target dialect for X86Vector in MLIR.
//
//===----------------------------------------------------------------------===//
-#ifndef MLIR_DIALECT_AVX512_AVX512DIALECT_H_
-#define MLIR_DIALECT_AVX512_AVX512DIALECT_H_
+#ifndef MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_
+#define MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_
#include "mlir/IR/BuiltinTypes.h"
#include "mlir/IR/Dialect.h"
@@ -19,9 +19,9 @@
#include "mlir/IR/OpImplementation.h"
#include "mlir/Interfaces/SideEffectInterfaces.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h.inc"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h.inc"
#define GET_OP_CLASSES
-#include "mlir/Dialect/AVX512/AVX512.h.inc"
+#include "mlir/Dialect/X86Vector/X86Vector.h.inc"
-#endif // MLIR_DIALECT_AVX512_AVX512DIALECT_H_
+#endif // MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_
diff --git a/mlir/include/mlir/InitAllDialects.h b/mlir/include/mlir/InitAllDialects.h
index edfd003dbe8e0..ee86721b21f0c 100644
--- a/mlir/include/mlir/InitAllDialects.h
+++ b/mlir/include/mlir/InitAllDialects.h
@@ -15,7 +15,6 @@
#define MLIR_INITALLDIALECTS_H_
#include "mlir/Dialect/AMX/AMXDialect.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
#include "mlir/Dialect/Affine/IR/AffineOps.h"
#include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
#include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
@@ -43,6 +42,7 @@
#include "mlir/Dialect/Tensor/IR/Tensor.h"
#include "mlir/Dialect/Tosa/IR/TosaOps.h"
#include "mlir/Dialect/Vector/VectorOps.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
#include "mlir/IR/Dialect.h"
namespace mlir {
@@ -55,7 +55,6 @@ inline void registerAllDialects(DialectRegistry ®istry) {
amx::AMXDialect,
arm_neon::ArmNeonDialect,
async::AsyncDialect,
- avx512::AVX512Dialect,
complex::ComplexDialect,
DLTIDialect,
gpu::GPUDialect,
@@ -78,7 +77,8 @@ inline void registerAllDialects(DialectRegistry ®istry) {
SDBMDialect,
shape::ShapeDialect,
tensor::TensorDialect,
- tosa::TosaDialect>();
+ tosa::TosaDialect,
+ x86vector::X86VectorDialect>();
// clang-format on
}
diff --git a/mlir/include/mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h b/mlir/include/mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h
deleted file mode 100644
index a9e4cf3cb3b92..0000000000000
--- a/mlir/include/mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h
+++ /dev/null
@@ -1,32 +0,0 @@
-//===- AVX512ToLLVMIRTranslation.h - AVX512 to LLVM IR ----------*- C++ -*-===//
-//
-// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
-// See https://llvm.org/LICENSE.txt for license information.
-// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
-//
-//===----------------------------------------------------------------------===//
-//
-// This provides registration calls for AVX512 dialect to LLVM IR
-// translation.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef MLIR_TARGET_LLVMIR_DIALECT_AVX512_AVX512TOLLVMIRTRANSLATION_H
-#define MLIR_TARGET_LLVMIR_DIALECT_AVX512_AVX512TOLLVMIRTRANSLATION_H
-
-namespace mlir {
-
-class DialectRegistry;
-class MLIRContext;
-
-/// Register the AVX512 dialect and the translation from it to the LLVM IR
-/// in the given registry;
-void registerAVX512DialectTranslation(DialectRegistry ®istry);
-
-/// Register the AVX512 dialect and the translation from it in the registry
-/// associated with the given context.
-void registerAVX512DialectTranslation(MLIRContext &context);
-
-} // namespace mlir
-
-#endif // MLIR_TARGET_LLVMIR_DIALECT_AVX512_AVX512TOLLVMIRTRANSLATION_H
diff --git a/mlir/include/mlir/Target/LLVMIR/Dialect/All.h b/mlir/include/mlir/Target/LLVMIR/Dialect/All.h
index 47907fde20428..7ff7d60ba9f1c 100644
--- a/mlir/include/mlir/Target/LLVMIR/Dialect/All.h
+++ b/mlir/include/mlir/Target/LLVMIR/Dialect/All.h
@@ -15,13 +15,13 @@
#define MLIR_TARGET_LLVMIR_DIALECT_ALL_H
#include "mlir/Target/LLVMIR/Dialect/AMX/AMXToLLVMIRTranslation.h"
-#include "mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/ArmNeon/ArmNeonToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/LLVMArmSVE/LLVMArmSVEToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.h"
#include "mlir/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.h"
+#include "mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h"
namespace mlir {
class DialectRegistry;
@@ -31,12 +31,12 @@ class DialectRegistry;
static inline void registerAllToLLVMIRTranslations(DialectRegistry ®istry) {
registerArmNeonDialectTranslation(registry);
registerAMXDialectTranslation(registry);
- registerAVX512DialectTranslation(registry);
registerLLVMArmSVEDialectTranslation(registry);
registerLLVMDialectTranslation(registry);
registerNVVMDialectTranslation(registry);
registerOpenMPDialectTranslation(registry);
registerROCDLDialectTranslation(registry);
+ registerX86VectorDialectTranslation(registry);
}
} // namespace mlir
diff --git a/mlir/include/mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h b/mlir/include/mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h
new file mode 100644
index 0000000000000..a215bcf625ae9
--- /dev/null
+++ b/mlir/include/mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h
@@ -0,0 +1,32 @@
+//===- X86VectorToLLVMIRTranslation.h - X86Vector to LLVM IR ----*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+//
+// This provides registration calls for X86Vector dialect to LLVM IR
+// translation.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef MLIR_TARGET_LLVMIR_DIALECT_X86VECTOR_X86VECTORTOLLVMIRTRANSLATION_H
+#define MLIR_TARGET_LLVMIR_DIALECT_X86VECTOR_X86VECTORTOLLVMIRTRANSLATION_H
+
+namespace mlir {
+
+class DialectRegistry;
+class MLIRContext;
+
+/// Register the X86Vector dialect and the translation from it to the LLVM IR
+/// in the given registry;
+void registerX86VectorDialectTranslation(DialectRegistry ®istry);
+
+/// Register the X86Vector dialect and the translation from it in the registry
+/// associated with the given context.
+void registerX86VectorDialectTranslation(MLIRContext &context);
+
+} // namespace mlir
+
+#endif // MLIR_TARGET_LLVMIR_DIALECT_X86VECTOR_X86VECTORTOLLVMIRTRANSLATION_H
diff --git a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
index 9a5683a9168e4..62c7eced084fa 100644
--- a/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
+++ b/mlir/lib/Conversion/VectorToLLVM/CMakeLists.txt
@@ -16,8 +16,6 @@ add_mlir_conversion_library(MLIRVectorToLLVM
MLIRArmNeon
MLIRAMX
MLIRAMXTransforms
- MLIRAVX512
- MLIRAVX512Transforms
MLIRArmSVE
MLIRArmSVEToLLVM
MLIRLLVMArmSVE
@@ -27,4 +25,6 @@ add_mlir_conversion_library(MLIRVectorToLLVM
MLIRTargetLLVMIRExport
MLIRTransforms
MLIRVector
+ MLIRX86Vector
+ MLIRX86VectorTransforms
)
diff --git a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
index 49ee670b2f06f..c2a83e70be7ed 100644
--- a/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
+++ b/mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVMPass.cpp
@@ -15,8 +15,6 @@
#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
#include "mlir/Dialect/AMX/AMXDialect.h"
#include "mlir/Dialect/AMX/Transforms.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
-#include "mlir/Dialect/AVX512/Transforms.h"
#include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
#include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMArmSVEDialect.h"
@@ -24,6 +22,8 @@
#include "mlir/Dialect/MemRef/IR/MemRef.h"
#include "mlir/Dialect/StandardOps/IR/Ops.h"
#include "mlir/Dialect/Vector/VectorOps.h"
+#include "mlir/Dialect/X86Vector/Transforms.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
#include "mlir/Transforms/GreedyPatternRewriteDriver.h"
using namespace mlir;
@@ -38,7 +38,7 @@ struct LowerVectorToLLVMPass
this->enableArmNeon = options.enableArmNeon;
this->enableArmSVE = options.enableArmSVE;
this->enableAMX = options.enableAMX;
- this->enableAVX512 = options.enableAVX512;
+ this->enableX86Vector = options.enableX86Vector;
}
// Override explicitly to allow conditional dialect dependence.
void getDependentDialects(DialectRegistry ®istry) const override {
@@ -50,8 +50,8 @@ struct LowerVectorToLLVMPass
registry.insert<LLVM::LLVMArmSVEDialect>();
if (enableAMX)
registry.insert<amx::AMXDialect>();
- if (enableAVX512)
- registry.insert<avx512::AVX512Dialect>();
+ if (enableX86Vector)
+ registry.insert<x86vector::X86VectorDialect>();
}
void runOnOperation() override;
};
@@ -115,9 +115,9 @@ void LowerVectorToLLVMPass::runOnOperation() {
configureAMXLegalizeForExportTarget(target);
populateAMXLegalizeForLLVMExportPatterns(converter, patterns);
}
- if (enableAVX512) {
- configureAVX512LegalizeForExportTarget(target);
- populateAVX512LegalizeForLLVMExportPatterns(converter, patterns);
+ if (enableX86Vector) {
+ configureX86VectorLegalizeForExportTarget(target);
+ populateX86VectorLegalizeForLLVMExportPatterns(converter, patterns);
}
if (failed(
diff --git a/mlir/lib/Dialect/AVX512/IR/CMakeLists.txt b/mlir/lib/Dialect/AVX512/IR/CMakeLists.txt
deleted file mode 100644
index 15b5c635ccc7c..0000000000000
--- a/mlir/lib/Dialect/AVX512/IR/CMakeLists.txt
+++ /dev/null
@@ -1,14 +0,0 @@
-add_mlir_dialect_library(MLIRAVX512
- AVX512Dialect.cpp
-
- ADDITIONAL_HEADER_DIRS
- ${MLIR_MAIN_INCLUDE_DIR}/mlir/Dialect/AVX512
-
- DEPENDS
- MLIRAVX512IncGen
-
- LINK_LIBS PUBLIC
- MLIRIR
- MLIRLLVMIR
- MLIRSideEffectInterfaces
- )
diff --git a/mlir/lib/Dialect/CMakeLists.txt b/mlir/lib/Dialect/CMakeLists.txt
index b4824707131da..ce4cb0a4e55d8 100644
--- a/mlir/lib/Dialect/CMakeLists.txt
+++ b/mlir/lib/Dialect/CMakeLists.txt
@@ -3,7 +3,6 @@ add_subdirectory(ArmNeon)
add_subdirectory(ArmSVE)
add_subdirectory(Async)
add_subdirectory(AMX)
-add_subdirectory(AVX512)
add_subdirectory(Complex)
add_subdirectory(DLTI)
add_subdirectory(GPU)
@@ -25,6 +24,7 @@ add_subdirectory(Tensor)
add_subdirectory(Tosa)
add_subdirectory(Utils)
add_subdirectory(Vector)
+add_subdirectory(X86Vector)
set(LLVM_OPTIONAL_SOURCES
Traits.cpp
diff --git a/mlir/lib/Dialect/AVX512/CMakeLists.txt b/mlir/lib/Dialect/X86Vector/CMakeLists.txt
similarity index 100%
rename from mlir/lib/Dialect/AVX512/CMakeLists.txt
rename to mlir/lib/Dialect/X86Vector/CMakeLists.txt
diff --git a/mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt b/mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt
new file mode 100644
index 0000000000000..012c468d34a15
--- /dev/null
+++ b/mlir/lib/Dialect/X86Vector/IR/CMakeLists.txt
@@ -0,0 +1,14 @@
+add_mlir_dialect_library(MLIRX86Vector
+ X86VectorDialect.cpp
+
+ ADDITIONAL_HEADER_DIRS
+ ${MLIR_MAIN_INCLUDE_DIR}/mlir/Dialect/X86Vector
+
+ DEPENDS
+ MLIRX86VectorIncGen
+
+ LINK_LIBS PUBLIC
+ MLIRIR
+ MLIRLLVMIR
+ MLIRSideEffectInterfaces
+ )
diff --git a/mlir/lib/Dialect/AVX512/IR/AVX512Dialect.cpp b/mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
similarity index 74%
rename from mlir/lib/Dialect/AVX512/IR/AVX512Dialect.cpp
rename to mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
index 8fba1f8d7ef9e..5c80fa3692fef 100644
--- a/mlir/lib/Dialect/AVX512/IR/AVX512Dialect.cpp
+++ b/mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp
@@ -1,4 +1,4 @@
-//===- AVX512Ops.cpp - MLIR AVX512 ops implementation ---------------------===//
+//===- X86VectorDialect.cpp - MLIR X86Vector ops implementation -----------===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,11 +6,11 @@
//
//===----------------------------------------------------------------------===//
//
-// This file implements the AVX512 dialect and its operations.
+// This file implements the X86Vector dialect and its operations.
//
//===----------------------------------------------------------------------===//
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
#include "mlir/Dialect/LLVMIR/LLVMTypes.h"
#include "mlir/IR/Builders.h"
#include "mlir/IR/OpImplementation.h"
@@ -18,14 +18,14 @@
using namespace mlir;
-void avx512::AVX512Dialect::initialize() {
+void x86vector::X86VectorDialect::initialize() {
addOperations<
#define GET_OP_LIST
-#include "mlir/Dialect/AVX512/AVX512.cpp.inc"
+#include "mlir/Dialect/X86Vector/X86Vector.cpp.inc"
>();
}
-static LogicalResult verify(avx512::MaskCompressOp op) {
+static LogicalResult verify(x86vector::MaskCompressOp op) {
if (op.src() && op.constant_src())
return emitError(op.getLoc(), "cannot use both src and constant_src");
@@ -42,4 +42,4 @@ static LogicalResult verify(avx512::MaskCompressOp op) {
}
#define GET_OP_CLASSES
-#include "mlir/Dialect/AVX512/AVX512.cpp.inc"
+#include "mlir/Dialect/X86Vector/X86Vector.cpp.inc"
diff --git a/mlir/lib/Dialect/AVX512/Transforms/CMakeLists.txt b/mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
similarity index 51%
rename from mlir/lib/Dialect/AVX512/Transforms/CMakeLists.txt
rename to mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
index c58221389721a..558cdaa4291a8 100644
--- a/mlir/lib/Dialect/AVX512/Transforms/CMakeLists.txt
+++ b/mlir/lib/Dialect/X86Vector/Transforms/CMakeLists.txt
@@ -1,11 +1,11 @@
-add_mlir_dialect_library(MLIRAVX512Transforms
+add_mlir_dialect_library(MLIRX86VectorTransforms
LegalizeForLLVMExport.cpp
DEPENDS
- MLIRAVX512ConversionsIncGen
+ MLIRX86VectorConversionsIncGen
LINK_LIBS PUBLIC
- MLIRAVX512
+ MLIRX86Vector
MLIRIR
MLIRLLVMIR
MLIRStandardToLLVM
diff --git a/mlir/lib/Dialect/AVX512/Transforms/LegalizeForLLVMExport.cpp b/mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
similarity index 91%
rename from mlir/lib/Dialect/AVX512/Transforms/LegalizeForLLVMExport.cpp
rename to mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
index eaa6498f17529..38f264ac0988b 100644
--- a/mlir/lib/Dialect/AVX512/Transforms/LegalizeForLLVMExport.cpp
+++ b/mlir/lib/Dialect/X86Vector/Transforms/LegalizeForLLVMExport.cpp
@@ -1,4 +1,4 @@
-//===- LegalizeForLLVMExport.cpp - Prepare AVX512 for LLVM translation ----===//
+//===- LegalizeForLLVMExport.cpp - Prepare X86Vector for LLVM translation -===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,19 +6,19 @@
//
//===----------------------------------------------------------------------===//
-#include "mlir/Dialect/AVX512/Transforms.h"
+#include "mlir/Dialect/X86Vector/Transforms.h"
#include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
#include "mlir/Dialect/LLVMIR/LLVMDialect.h"
#include "mlir/Dialect/StandardOps/IR/Ops.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
#include "mlir/IR/BuiltinOps.h"
#include "mlir/IR/PatternMatch.h"
using namespace mlir;
-using namespace mlir::avx512;
+using namespace mlir::x86vector;
-/// Extracts the "main" vector element type from the given AVX512 operation.
+/// Extracts the "main" vector element type from the given X86Vector operation.
template <typename OpTy>
static Type getSrcVectorElementType(OpTy op) {
return op.src().getType().template cast<VectorType>().getElementType();
@@ -29,6 +29,7 @@ Type getSrcVectorElementType(Vp2IntersectOp op) {
}
namespace {
+
/// Base conversion for AVX512 ops that can be lowered to one of the two
/// intrinsics based on the bitwidth of their "main" vector element type. This
/// relies on the to-LLVM-dialect conversion helpers to correctly pack the
@@ -126,14 +127,14 @@ using Registry = RegistryImpl<
} // namespace
-/// Populate the given list with patterns that convert from AVX512 to LLVM.
-void mlir::populateAVX512LegalizeForLLVMExportPatterns(
+/// Populate the given list with patterns that convert from X86Vector to LLVM.
+void mlir::populateX86VectorLegalizeForLLVMExportPatterns(
LLVMTypeConverter &converter, RewritePatternSet &patterns) {
Registry::registerPatterns(converter, patterns);
patterns.add<MaskCompressOpConversion>(converter);
}
-void mlir::configureAVX512LegalizeForExportTarget(
+void mlir::configureX86VectorLegalizeForExportTarget(
LLVMConversionTarget &target) {
Registry::configureTarget(target);
target.addLegalOp<MaskCompressIntrOp>();
diff --git a/mlir/lib/Target/LLVMIR/CMakeLists.txt b/mlir/lib/Target/LLVMIR/CMakeLists.txt
index 4f34654407849..6448dc3de27f7 100644
--- a/mlir/lib/Target/LLVMIR/CMakeLists.txt
+++ b/mlir/lib/Target/LLVMIR/CMakeLists.txt
@@ -38,7 +38,7 @@ add_mlir_translation_library(MLIRToLLVMIRTranslationRegistration
LINK_LIBS PUBLIC
MLIRArmNeonToLLVMIRTranslation
MLIRAMXToLLVMIRTranslation
- MLIRAVX512ToLLVMIRTranslation
+ MLIRX86VectorToLLVMIRTranslation
MLIRLLVMArmSVEToLLVMIRTranslation
MLIRLLVMToLLVMIRTranslation
MLIRNVVMToLLVMIRTranslation
diff --git a/mlir/lib/Target/LLVMIR/Dialect/AVX512/CMakeLists.txt b/mlir/lib/Target/LLVMIR/Dialect/AVX512/CMakeLists.txt
deleted file mode 100644
index 548e0e9612667..0000000000000
--- a/mlir/lib/Target/LLVMIR/Dialect/AVX512/CMakeLists.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-add_mlir_translation_library(MLIRAVX512ToLLVMIRTranslation
- AVX512ToLLVMIRTranslation.cpp
-
- DEPENDS
- MLIRAVX512ConversionsIncGen
-
- LINK_COMPONENTS
- Core
-
- LINK_LIBS PUBLIC
- MLIRIR
- MLIRAVX512
- MLIRLLVMIR
- MLIRSupport
- MLIRTargetLLVMIRExport
- )
diff --git a/mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt b/mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
index ebf74740d06c5..73b786465b70d 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
+++ b/mlir/lib/Target/LLVMIR/Dialect/CMakeLists.txt
@@ -1,8 +1,8 @@
add_subdirectory(ArmNeon)
add_subdirectory(AMX)
-add_subdirectory(AVX512)
add_subdirectory(LLVMArmSVE)
add_subdirectory(LLVMIR)
add_subdirectory(NVVM)
add_subdirectory(OpenMP)
add_subdirectory(ROCDL)
+add_subdirectory(X86Vector)
diff --git a/mlir/lib/Target/LLVMIR/Dialect/X86Vector/CMakeLists.txt b/mlir/lib/Target/LLVMIR/Dialect/X86Vector/CMakeLists.txt
new file mode 100644
index 0000000000000..0331633cde05b
--- /dev/null
+++ b/mlir/lib/Target/LLVMIR/Dialect/X86Vector/CMakeLists.txt
@@ -0,0 +1,16 @@
+add_mlir_translation_library(MLIRX86VectorToLLVMIRTranslation
+ X86VectorToLLVMIRTranslation.cpp
+
+ DEPENDS
+ MLIRX86VectorConversionsIncGen
+
+ LINK_COMPONENTS
+ Core
+
+ LINK_LIBS PUBLIC
+ MLIRIR
+ MLIRX86Vector
+ MLIRLLVMIR
+ MLIRSupport
+ MLIRTargetLLVMIRExport
+ )
diff --git a/mlir/lib/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.cpp b/mlir/lib/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.cpp
similarity index 60%
rename from mlir/lib/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.cpp
rename to mlir/lib/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.cpp
index 2722947e72d1c..ec8b5c1d7e3c4 100644
--- a/mlir/lib/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.cpp
+++ b/mlir/lib/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.cpp
@@ -1,4 +1,4 @@
-//===- AVX512ToLLVMIRTranslation.cpp - Translate AVX512 to LLVM IR---------===//
+//===- X86VectorToLLVMIRTranslation.cpp - Translate X86Vector to LLVM IR---===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,13 +6,13 @@
//
//===----------------------------------------------------------------------===//
//
-// This file implements a translation between the MLIR AVX512 dialect and
+// This file implements a translation between the MLIR X86Vector dialect and
// LLVM IR.
//
//===----------------------------------------------------------------------===//
-#include "mlir/Target/LLVMIR/Dialect/AVX512/AVX512ToLLVMIRTranslation.h"
-#include "mlir/Dialect/AVX512/AVX512Dialect.h"
+#include "mlir/Target/LLVMIR/Dialect/X86Vector/X86VectorToLLVMIRTranslation.h"
+#include "mlir/Dialect/X86Vector/X86VectorDialect.h"
#include "mlir/IR/Operation.h"
#include "mlir/Target/LLVMIR/ModuleTranslation.h"
@@ -24,8 +24,8 @@ using namespace mlir::LLVM;
namespace {
/// Implementation of the dialect interface that converts operations belonging
-/// to the AVX512 dialect to LLVM IR.
-class AVX512DialectLLVMIRTranslationInterface
+/// to the X86Vector dialect to LLVM IR.
+class X86VectorDialectLLVMIRTranslationInterface
: public LLVMTranslationDialectInterface {
public:
using LLVMTranslationDialectInterface::LLVMTranslationDialectInterface;
@@ -36,21 +36,21 @@ class AVX512DialectLLVMIRTranslationInterface
convertOperation(Operation *op, llvm::IRBuilderBase &builder,
LLVM::ModuleTranslation &moduleTranslation) const final {
Operation &opInst = *op;
-#include "mlir/Dialect/AVX512/AVX512Conversions.inc"
+#include "mlir/Dialect/X86Vector/X86VectorConversions.inc"
return failure();
}
};
} // end namespace
-void mlir::registerAVX512DialectTranslation(DialectRegistry ®istry) {
- registry.insert<avx512::AVX512Dialect>();
- registry.addDialectInterface<avx512::AVX512Dialect,
- AVX512DialectLLVMIRTranslationInterface>();
+void mlir::registerX86VectorDialectTranslation(DialectRegistry ®istry) {
+ registry.insert<x86vector::X86VectorDialect>();
+ registry.addDialectInterface<x86vector::X86VectorDialect,
+ X86VectorDialectLLVMIRTranslationInterface>();
}
-void mlir::registerAVX512DialectTranslation(MLIRContext &context) {
+void mlir::registerX86VectorDialectTranslation(MLIRContext &context) {
DialectRegistry registry;
- registerAVX512DialectTranslation(registry);
+ registerX86VectorDialectTranslation(registry);
context.appendDialectRegistry(registry);
}
diff --git a/mlir/test/CMakeLists.txt b/mlir/test/CMakeLists.txt
index 7343c3b076ba6..c7175980d5694 100644
--- a/mlir/test/CMakeLists.txt
+++ b/mlir/test/CMakeLists.txt
@@ -29,7 +29,7 @@ if (MLIR_INCLUDE_INTEGRATION_TESTS)
set(INTEL_SDE_EXECUTABLE "" CACHE STRING
"If set, arch-specific integration tests are run with Intel SDE.")
option(MLIR_RUN_AMX_TESTS "Run AMX tests.")
- option(MLIR_RUN_AVX512_TESTS "Run AVX512 tests.")
+ option(MLIR_RUN_X86VECTOR_TESTS "Run X86Vector tests.")
# Passed to lit.site.cfg.py.in to set up the path where to find the libraries.
set(MLIR_INTEGRATION_TEST_DIR ${CMAKE_LIBRARY_OUTPUT_DIRECTORY})
diff --git a/mlir/test/Dialect/AVX512/legalize-for-llvm.mlir b/mlir/test/Dialect/AVX512/legalize-for-llvm.mlir
deleted file mode 100644
index 527a2629461cb..0000000000000
--- a/mlir/test/Dialect/AVX512/legalize-for-llvm.mlir
+++ /dev/null
@@ -1,41 +0,0 @@
-// RUN: mlir-opt %s -convert-vector-to-llvm="enable-avx512" | mlir-opt | FileCheck %s
-
-func @avx512_mask_rndscale(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
- -> (vector<16xf32>, vector<8xf64>, vector<16xf32>, vector<8xf64>)
-{
- // CHECK: avx512.intr.mask.rndscale.ps.512
- %0 = avx512.mask.rndscale %a, %i32, %a, %i16, %i32: vector<16xf32>
- // CHECK: avx512.intr.mask.rndscale.pd.512
- %1 = avx512.mask.rndscale %b, %i32, %b, %i8, %i32: vector<8xf64>
-
- // CHECK: avx512.intr.mask.scalef.ps.512
- %2 = avx512.mask.scalef %a, %a, %a, %i16, %i32: vector<16xf32>
- // CHECK: avx512.intr.mask.scalef.pd.512
- %3 = avx512.mask.scalef %b, %b, %b, %i8, %i32: vector<8xf64>
-
- // Keep results alive.
- return %0, %1, %2, %3 : vector<16xf32>, vector<8xf64>, vector<16xf32>, vector<8xf64>
-}
-
-func @avx512_mask_compress(%k1: vector<16xi1>, %a1: vector<16xf32>,
- %k2: vector<8xi1>, %a2: vector<8xi64>)
- -> (vector<16xf32>, vector<16xf32>, vector<8xi64>)
-{
- // CHECK: avx512.intr.mask.compress
- %0 = avx512.mask.compress %k1, %a1 : vector<16xf32>
- // CHECK: avx512.intr.mask.compress
- %1 = avx512.mask.compress %k1, %a1 {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
- // CHECK: avx512.intr.mask.compress
- %2 = avx512.mask.compress %k2, %a2, %a2 : vector<8xi64>, vector<8xi64>
- return %0, %1, %2 : vector<16xf32>, vector<16xf32>, vector<8xi64>
-}
-
-func @avx512_vp2intersect(%a: vector<16xi32>, %b: vector<8xi64>)
- -> (vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>)
-{
- // CHECK: avx512.intr.vp2intersect.d.512
- %0, %1 = avx512.vp2intersect %a, %a : vector<16xi32>
- // CHECK: avx512.intr.vp2intersect.q.512
- %2, %3 = avx512.vp2intersect %b, %b : vector<8xi64>
- return %0, %1, %2, %3 : vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>
-}
diff --git a/mlir/test/Dialect/AVX512/roundtrip.mlir b/mlir/test/Dialect/AVX512/roundtrip.mlir
deleted file mode 100644
index dc1a65bbd47b7..0000000000000
--- a/mlir/test/Dialect/AVX512/roundtrip.mlir
+++ /dev/null
@@ -1,44 +0,0 @@
-// RUN: mlir-opt -verify-diagnostics %s | mlir-opt | FileCheck %s
-
-func @avx512_mask_rndscale(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
- -> (vector<16xf32>, vector<8xf64>)
-{
- // CHECK: avx512.mask.rndscale {{.*}}: vector<16xf32>
- %0 = avx512.mask.rndscale %a, %i32, %a, %i16, %i32 : vector<16xf32>
- // CHECK: avx512.mask.rndscale {{.*}}: vector<8xf64>
- %1 = avx512.mask.rndscale %b, %i32, %b, %i8, %i32 : vector<8xf64>
- return %0, %1: vector<16xf32>, vector<8xf64>
-}
-
-func @avx512_scalef(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
- -> (vector<16xf32>, vector<8xf64>)
-{
- // CHECK: avx512.mask.scalef {{.*}}: vector<16xf32>
- %0 = avx512.mask.scalef %a, %a, %a, %i16, %i32: vector<16xf32>
- // CHECK: avx512.mask.scalef {{.*}}: vector<8xf64>
- %1 = avx512.mask.scalef %b, %b, %b, %i8, %i32 : vector<8xf64>
- return %0, %1: vector<16xf32>, vector<8xf64>
-}
-
-func @avx512_vp2intersect(%a: vector<16xi32>, %b: vector<8xi64>)
- -> (vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>)
-{
- // CHECK: avx512.vp2intersect {{.*}} : vector<16xi32>
- %0, %1 = avx512.vp2intersect %a, %a : vector<16xi32>
- // CHECK: avx512.vp2intersect {{.*}} : vector<8xi64>
- %2, %3 = avx512.vp2intersect %b, %b : vector<8xi64>
- return %0, %1, %2, %3 : vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>
-}
-
-func @avx512_mask_compress(%k1: vector<16xi1>, %a1: vector<16xf32>,
- %k2: vector<8xi1>, %a2: vector<8xi64>)
- -> (vector<16xf32>, vector<16xf32>, vector<8xi64>)
-{
- // CHECK: avx512.mask.compress {{.*}} : vector<16xf32>
- %0 = avx512.mask.compress %k1, %a1 : vector<16xf32>
- // CHECK: avx512.mask.compress {{.*}} : vector<16xf32>
- %1 = avx512.mask.compress %k1, %a1 {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
- // CHECK: avx512.mask.compress {{.*}} : vector<8xi64>
- %2 = avx512.mask.compress %k2, %a2, %a2 : vector<8xi64>, vector<8xi64>
- return %0, %1, %2 : vector<16xf32>, vector<16xf32>, vector<8xi64>
-}
diff --git a/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir b/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
new file mode 100644
index 0000000000000..477ba558523e9
--- /dev/null
+++ b/mlir/test/Dialect/X86Vector/legalize-for-llvm.mlir
@@ -0,0 +1,44 @@
+// RUN: mlir-opt %s -convert-vector-to-llvm="enable-x86vector" | mlir-opt | FileCheck %s
+
+// CHECK-LABEL: func @avx512_mask_rndscale
+func @avx512_mask_rndscale(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
+ -> (vector<16xf32>, vector<8xf64>, vector<16xf32>, vector<8xf64>)
+{
+ // CHECK: x86vector.avx512.intr.mask.rndscale.ps.512
+ %0 = x86vector.avx512.mask.rndscale %a, %i32, %a, %i16, %i32: vector<16xf32>
+ // CHECK: x86vector.avx512.intr.mask.rndscale.pd.512
+ %1 = x86vector.avx512.mask.rndscale %b, %i32, %b, %i8, %i32: vector<8xf64>
+
+ // CHECK: x86vector.avx512.intr.mask.scalef.ps.512
+ %2 = x86vector.avx512.mask.scalef %a, %a, %a, %i16, %i32: vector<16xf32>
+ // CHECK: x86vector.avx512.intr.mask.scalef.pd.512
+ %3 = x86vector.avx512.mask.scalef %b, %b, %b, %i8, %i32: vector<8xf64>
+
+ // Keep results alive.
+ return %0, %1, %2, %3 : vector<16xf32>, vector<8xf64>, vector<16xf32>, vector<8xf64>
+}
+
+// CHECK-LABEL: func @avx512_mask_compress
+func @avx512_mask_compress(%k1: vector<16xi1>, %a1: vector<16xf32>,
+ %k2: vector<8xi1>, %a2: vector<8xi64>)
+ -> (vector<16xf32>, vector<16xf32>, vector<8xi64>)
+{
+ // CHECK: x86vector.avx512.intr.mask.compress
+ %0 = x86vector.avx512.mask.compress %k1, %a1 : vector<16xf32>
+ // CHECK: x86vector.avx512.intr.mask.compress
+ %1 = x86vector.avx512.mask.compress %k1, %a1 {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
+ // CHECK: x86vector.avx512.intr.mask.compress
+ %2 = x86vector.avx512.mask.compress %k2, %a2, %a2 : vector<8xi64>, vector<8xi64>
+ return %0, %1, %2 : vector<16xf32>, vector<16xf32>, vector<8xi64>
+}
+
+// CHECK-LABEL: func @avx512_vp2intersect
+func @avx512_vp2intersect(%a: vector<16xi32>, %b: vector<8xi64>)
+ -> (vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>)
+{
+ // CHECK: x86vector.avx512.intr.vp2intersect.d.512
+ %0, %1 = x86vector.avx512.vp2intersect %a, %a : vector<16xi32>
+ // CHECK: x86vector.avx512.intr.vp2intersect.q.512
+ %2, %3 = x86vector.avx512.vp2intersect %b, %b : vector<8xi64>
+ return %0, %1, %2, %3 : vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>
+}
diff --git a/mlir/test/Dialect/X86Vector/roundtrip.mlir b/mlir/test/Dialect/X86Vector/roundtrip.mlir
new file mode 100644
index 0000000000000..57cfe9800c06a
--- /dev/null
+++ b/mlir/test/Dialect/X86Vector/roundtrip.mlir
@@ -0,0 +1,48 @@
+// RUN: mlir-opt -verify-diagnostics %s | mlir-opt | FileCheck %s
+
+// CHECK-LABEL: func @avx512_mask_rndscale
+func @avx512_mask_rndscale(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
+ -> (vector<16xf32>, vector<8xf64>)
+{
+ // CHECK: x86vector.avx512.mask.rndscale {{.*}}: vector<16xf32>
+ %0 = x86vector.avx512.mask.rndscale %a, %i32, %a, %i16, %i32 : vector<16xf32>
+ // CHECK: x86vector.avx512.mask.rndscale {{.*}}: vector<8xf64>
+ %1 = x86vector.avx512.mask.rndscale %b, %i32, %b, %i8, %i32 : vector<8xf64>
+ return %0, %1: vector<16xf32>, vector<8xf64>
+}
+
+// CHECK-LABEL: func @avx512_scalef
+func @avx512_scalef(%a: vector<16xf32>, %b: vector<8xf64>, %i32: i32, %i16: i16, %i8: i8)
+ -> (vector<16xf32>, vector<8xf64>)
+{
+ // CHECK: x86vector.avx512.mask.scalef {{.*}}: vector<16xf32>
+ %0 = x86vector.avx512.mask.scalef %a, %a, %a, %i16, %i32: vector<16xf32>
+ // CHECK: x86vector.avx512.mask.scalef {{.*}}: vector<8xf64>
+ %1 = x86vector.avx512.mask.scalef %b, %b, %b, %i8, %i32 : vector<8xf64>
+ return %0, %1: vector<16xf32>, vector<8xf64>
+}
+
+// CHECK-LABEL: func @avx512_vp2intersect
+func @avx512_vp2intersect(%a: vector<16xi32>, %b: vector<8xi64>)
+ -> (vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>)
+{
+ // CHECK: x86vector.avx512.vp2intersect {{.*}} : vector<16xi32>
+ %0, %1 = x86vector.avx512.vp2intersect %a, %a : vector<16xi32>
+ // CHECK: x86vector.avx512.vp2intersect {{.*}} : vector<8xi64>
+ %2, %3 = x86vector.avx512.vp2intersect %b, %b : vector<8xi64>
+ return %0, %1, %2, %3 : vector<16xi1>, vector<16xi1>, vector<8xi1>, vector<8xi1>
+}
+
+// CHECK-LABEL: func @avx512_mask_compress
+func @avx512_mask_compress(%k1: vector<16xi1>, %a1: vector<16xf32>,
+ %k2: vector<8xi1>, %a2: vector<8xi64>)
+ -> (vector<16xf32>, vector<16xf32>, vector<8xi64>)
+{
+ // CHECK: x86vector.avx512.mask.compress {{.*}} : vector<16xf32>
+ %0 = x86vector.avx512.mask.compress %k1, %a1 : vector<16xf32>
+ // CHECK: x86vector.avx512.mask.compress {{.*}} : vector<16xf32>
+ %1 = x86vector.avx512.mask.compress %k1, %a1 {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
+ // CHECK: x86vector.avx512.mask.compress {{.*}} : vector<8xi64>
+ %2 = x86vector.avx512.mask.compress %k2, %a2, %a2 : vector<8xi64>, vector<8xi64>
+ return %0, %1, %2 : vector<16xf32>, vector<16xf32>, vector<8xi64>
+}
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/lit.local.cfg b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
similarity index 78%
rename from mlir/test/Integration/Dialect/Vector/CPU/AVX512/lit.local.cfg
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
index 6e6803e231fb1..1415fb0c1758a 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/lit.local.cfg
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/lit.local.cfg
@@ -1,7 +1,7 @@
import sys
-# AVX512 tests must be enabled via build flag.
-if config.mlir_run_avx512_tests != 'ON':
+# X86Vector tests must be enabled via build flag.
+if config.mlir_run_x86vector_tests != 'ON':
config.unsupported = True
# No JIT on win32.
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-mask-compress.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
similarity index 76%
rename from mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-mask-compress.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
index ae34524b50c89..2bf2c3aafd1c1 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-mask-compress.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-mask-compress.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-avx512" -convert-std-to-llvm | \
+// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s
@@ -8,8 +8,8 @@ func @entry() -> i32 {
%a = std.constant dense<[1., 0., 0., 2., 4., 3., 5., 7., 8., 1., 5., 5., 3., 1., 0., 7.]> : vector<16xf32>
%k = std.constant dense<[1, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 0]> : vector<16xi1>
- %r1 = avx512.mask.compress %k, %a : vector<16xf32>
- %r2 = avx512.mask.compress %k, %a {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
+ %r1 = x86vector.avx512.mask.compress %k, %a : vector<16xf32>
+ %r2 = x86vector.avx512.mask.compress %k, %a {constant_src = dense<5.0> : vector<16xf32>} : vector<16xf32>
vector.print %r1 : vector<16xf32>
// CHECK: ( 1, 0, 2, 4, 5, 5, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0 )
@@ -18,7 +18,7 @@ func @entry() -> i32 {
// CHECK: ( 1, 0, 2, 4, 5, 5, 3, 1, 0, 5, 5, 5, 5, 5, 5, 5 )
%src = std.constant dense<[0., 2., 1., 8., 6., 4., 4., 3., 2., 8., 5., 6., 3., 7., 6., 9.]> : vector<16xf32>
- %r3 = avx512.mask.compress %k, %a, %src : vector<16xf32>, vector<16xf32>
+ %r3 = x86vector.avx512.mask.compress %k, %a, %src : vector<16xf32>, vector<16xf32>
vector.print %r3 : vector<16xf32>
// CHECK: ( 1, 0, 2, 4, 5, 5, 3, 1, 0, 8, 5, 6, 3, 7, 6, 9 )
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-sparse-dot-product.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
similarity index 98%
rename from mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-sparse-dot-product.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
index 00b21178f7b59..3018a173e76c5 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-sparse-dot-product.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-sparse-dot-product.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-avx512" -convert-std-to-llvm | \
+// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s
@@ -35,11 +35,11 @@
func @vector_dot(%v_A : vector<8xi64>, %v_B : vector<8xf64>,
%v_C : vector<8xi64>, %v_D : vector<8xf64>) -> f64 {
// Compute intersection of indices.
- %k0, %k1 = avx512.vp2intersect %v_A, %v_C : vector<8xi64>
+ %k0, %k1 = x86vector.avx512.vp2intersect %v_A, %v_C : vector<8xi64>
// Filter out values without match and compress vector.
- %p0 = avx512.mask.compress %k0, %v_B : vector<8xf64>
- %p1 = avx512.mask.compress %k1, %v_D : vector<8xf64>
+ %p0 = x86vector.avx512.mask.compress %k0, %v_B : vector<8xf64>
+ %p1 = x86vector.avx512.mask.compress %k1, %v_D : vector<8xf64>
// Dense vector dot product.
%acc = std.constant 0.0 : f64
diff --git a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-vp2intersect-i32.mlir b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
similarity index 95%
rename from mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-vp2intersect-i32.mlir
rename to mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
index e291e809f201b..0782fad98e9c3 100644
--- a/mlir/test/Integration/Dialect/Vector/CPU/AVX512/test-vp2intersect-i32.mlir
+++ b/mlir/test/Integration/Dialect/Vector/CPU/X86Vector/test-vp2intersect-i32.mlir
@@ -1,4 +1,4 @@
-// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-avx512" -convert-std-to-llvm | \
+// RUN: mlir-opt %s -convert-scf-to-std -convert-vector-to-llvm="enable-x86vector" -convert-std-to-llvm | \
// RUN: mlir-translate --mlir-to-llvmir | \
// RUN: %lli --entry-function=entry --mattr="avx512bw,avx512vp2intersect" --dlopen=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \
// RUN: FileCheck %s
@@ -40,7 +40,7 @@ func @entry() -> i32 {
vector.print %w9 : vector<16xi32>
// CHECK: ( 1, 1, 1, 1, 2, 1, 1, -219, 12, 12, 12, 0, 0, 0, 1, 0 )
- %k1, %k2 = avx512.vp2intersect %v9, %w9 : vector<16xi32>
+ %k1, %k2 = x86vector.avx512.vp2intersect %v9, %w9 : vector<16xi32>
vector.print %k1 : vector<16xi1>
// CHECK: ( 1, 1, 1, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1 )
diff --git a/mlir/test/Target/LLVMIR/avx512.mlir b/mlir/test/Target/LLVMIR/x86vector.mlir
similarity index 84%
rename from mlir/test/Target/LLVMIR/avx512.mlir
rename to mlir/test/Target/LLVMIR/x86vector.mlir
index 6d549f6944db3..9c202a6e3ab58 100644
--- a/mlir/test/Target/LLVMIR/avx512.mlir
+++ b/mlir/test/Target/LLVMIR/x86vector.mlir
@@ -7,10 +7,10 @@ llvm.func @LLVM_x86_avx512_mask_ps_512(%a: vector<16 x f32>,
{
%b = llvm.mlir.constant(42 : i32) : i32
// CHECK: call <16 x float> @llvm.x86.avx512.mask.rndscale.ps.512(<16 x float>
- %0 = "avx512.intr.mask.rndscale.ps.512"(%a, %b, %a, %c, %b) :
+ %0 = "x86vector.avx512.intr.mask.rndscale.ps.512"(%a, %b, %a, %c, %b) :
(vector<16 x f32>, i32, vector<16 x f32>, i16, i32) -> vector<16 x f32>
// CHECK: call <16 x float> @llvm.x86.avx512.mask.scalef.ps.512(<16 x float>
- %1 = "avx512.intr.mask.scalef.ps.512"(%a, %a, %a, %c, %b) :
+ %1 = "x86vector.avx512.intr.mask.scalef.ps.512"(%a, %a, %a, %c, %b) :
(vector<16 x f32>, vector<16 x f32>, vector<16 x f32>, i16, i32) -> vector<16 x f32>
llvm.return %1: vector<16 x f32>
}
@@ -22,10 +22,10 @@ llvm.func @LLVM_x86_avx512_mask_pd_512(%a: vector<8xf64>,
{
%b = llvm.mlir.constant(42 : i32) : i32
// CHECK: call <8 x double> @llvm.x86.avx512.mask.rndscale.pd.512(<8 x double>
- %0 = "avx512.intr.mask.rndscale.pd.512"(%a, %b, %a, %c, %b) :
+ %0 = "x86vector.avx512.intr.mask.rndscale.pd.512"(%a, %b, %a, %c, %b) :
(vector<8xf64>, i32, vector<8xf64>, i8, i32) -> vector<8xf64>
// CHECK: call <8 x double> @llvm.x86.avx512.mask.scalef.pd.512(<8 x double>
- %1 = "avx512.intr.mask.scalef.pd.512"(%a, %a, %a, %c, %b) :
+ %1 = "x86vector.avx512.intr.mask.scalef.pd.512"(%a, %a, %a, %c, %b) :
(vector<8xf64>, vector<8xf64>, vector<8xf64>, i8, i32) -> vector<8xf64>
llvm.return %1: vector<8xf64>
}
@@ -35,7 +35,7 @@ llvm.func @LLVM_x86_mask_compress(%k: vector<16xi1>, %a: vector<16xf32>)
-> vector<16xf32>
{
// CHECK: call <16 x float> @llvm.x86.avx512.mask.compress.v16f32(
- %0 = "avx512.intr.mask.compress"(%a, %a, %k) :
+ %0 = "x86vector.avx512.intr.mask.compress"(%a, %a, %k) :
(vector<16xf32>, vector<16xf32>, vector<16xi1>) -> vector<16xf32>
llvm.return %0 : vector<16xf32>
}
@@ -45,7 +45,7 @@ llvm.func @LLVM_x86_vp2intersect_d_512(%a: vector<16xi32>, %b: vector<16xi32>)
-> !llvm.struct<(vector<16 x i1>, vector<16 x i1>)>
{
// CHECK: call { <16 x i1>, <16 x i1> } @llvm.x86.avx512.vp2intersect.d.512(<16 x i32>
- %0 = "avx512.intr.vp2intersect.d.512"(%a, %b) :
+ %0 = "x86vector.avx512.intr.vp2intersect.d.512"(%a, %b) :
(vector<16xi32>, vector<16xi32>) -> !llvm.struct<(vector<16 x i1>, vector<16 x i1>)>
llvm.return %0 : !llvm.struct<(vector<16 x i1>, vector<16 x i1>)>
}
@@ -55,7 +55,7 @@ llvm.func @LLVM_x86_vp2intersect_q_512(%a: vector<8xi64>, %b: vector<8xi64>)
-> !llvm.struct<(vector<8 x i1>, vector<8 x i1>)>
{
// CHECK: call { <8 x i1>, <8 x i1> } @llvm.x86.avx512.vp2intersect.q.512(<8 x i64>
- %0 = "avx512.intr.vp2intersect.q.512"(%a, %b) :
+ %0 = "x86vector.avx512.intr.vp2intersect.q.512"(%a, %b) :
(vector<8xi64>, vector<8xi64>) -> !llvm.struct<(vector<8 x i1>, vector<8 x i1>)>
llvm.return %0 : !llvm.struct<(vector<8 x i1>, vector<8 x i1>)>
}
diff --git a/mlir/test/lit.site.cfg.py.in b/mlir/test/lit.site.cfg.py.in
index dbc8460df5767..844707f280b9a 100644
--- a/mlir/test/lit.site.cfg.py.in
+++ b/mlir/test/lit.site.cfg.py.in
@@ -48,7 +48,7 @@ config.enable_bindings_python = @MLIR_BINDINGS_PYTHON_ENABLED@
config.mlir_integration_test_dir = "@MLIR_INTEGRATION_TEST_DIR@"
config.intel_sde_executable = "@INTEL_SDE_EXECUTABLE@"
config.mlir_run_amx_tests = "@MLIR_RUN_AMX_TESTS@"
-config.mlir_run_avx512_tests = "@MLIR_RUN_AVX512_TESTS@"
+config.mlir_run_x86vector_tests = "@MLIR_RUN_X86VECTOR_TESTS@"
config.mlir_include_integration_tests = "@MLIR_INCLUDE_INTEGRATION_TESTS@"
# Support substitution of the tools_dir with user parameters. This is
diff --git a/mlir/test/mlir-opt/commandline.mlir b/mlir/test/mlir-opt/commandline.mlir
index a4d8835d7da0a..f6ae63d70f20f 100644
--- a/mlir/test/mlir-opt/commandline.mlir
+++ b/mlir/test/mlir-opt/commandline.mlir
@@ -6,7 +6,6 @@
// CHECK-NEXT: arm_neon
// CHECK-NEXT: arm_sve
// CHECK-NEXT: async
-// CHECK-NEXT: avx512
// CHECK-NEXT: complex
// CHECK-NEXT: dlti
// CHECK-NEXT: gpu
@@ -30,3 +29,4 @@
// CHECK-NEXT: test
// CHECK-NEXT: tosa
// CHECK-NEXT: vector
+// CHECK-NEXT: x86vector
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