[Mlir-commits] [mlir] 2f3adc5 - [MLIR][SPIRV] Rename `spv._module_end` to `spv.mlir.endmodule`
Lei Zhang
llvmlistbot at llvm.org
Thu Nov 19 10:25:29 PST 2020
Author: ergawy
Date: 2020-11-19T13:25:13-05:00
New Revision: 2f3adc54b57356cd207ded2ec2d7f4e1273da0ff
URL: https://github.com/llvm/llvm-project/commit/2f3adc54b57356cd207ded2ec2d7f4e1273da0ff
DIFF: https://github.com/llvm/llvm-project/commit/2f3adc54b57356cd207ded2ec2d7f4e1273da0ff.diff
LOG: [MLIR][SPIRV] Rename `spv._module_end` to `spv.mlir.endmodule`
This commit does the renaming mentioned in the title in order to bring
'spv' dialect closer to the MLIR naming conventions.
Reviewed By: antiagainst
Differential Revision: https://reviews.llvm.org/D91792
Added:
Modified:
mlir/docs/Dialects/SPIR-V.md
mlir/docs/SPIRVToLLVMDialectConversion.md
mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td
mlir/test/Conversion/SPIRVToLLVM/module-ops-to-llvm.mlir
mlir/test/Dialect/SPIRV/structure-ops.mlir
Removed:
################################################################################
diff --git a/mlir/docs/Dialects/SPIR-V.md b/mlir/docs/Dialects/SPIR-V.md
index 76d47cce3353..0d1aefae1440 100644
--- a/mlir/docs/Dialects/SPIR-V.md
+++ b/mlir/docs/Dialects/SPIR-V.md
@@ -92,7 +92,7 @@ The SPIR-V dialect adopts the following conventions for IR:
(de)serialization.
* Ops with `mlir.snake_case` names are those that have no corresponding
instructions (or concepts) in the binary format. They are introduced to
- satisfy MLIR structural requirements. For example, `spv.mlir.module_end` and
+ satisfy MLIR structural requirements. For example, `spv.mlir.endmodule` and
`spv.mlir.merge`. They map to no instructions during (de)serialization.
(TODO: consider merging the last two cases and adopting `spv.mlir.` prefix for
diff --git a/mlir/docs/SPIRVToLLVMDialectConversion.md b/mlir/docs/SPIRVToLLVMDialectConversion.md
index bf4ceee42cdb..c42a529beed1 100644
--- a/mlir/docs/SPIRVToLLVMDialectConversion.md
+++ b/mlir/docs/SPIRVToLLVMDialectConversion.md
@@ -787,7 +787,7 @@ Module in SPIR-V has one region that contains one block. It is defined via
`spv.module` is converted into `ModuleOp`. This plays a role of enclosing scope
to LLVM ops. At the moment, SPIR-V module attributes are ignored.
-`spv._module_end` is mapped to an equivalent terminator `ModuleTerminatorOp`.
+`spv.mlir.endmodule` is mapped to an equivalent terminator `ModuleTerminatorOp`.
## `mlir-spirv-cpu-runner`
diff --git a/mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td b/mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td
index 9d768f684279..0b1f6d294ac0 100644
--- a/mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td
+++ b/mlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td
@@ -373,7 +373,7 @@ def SPV_ModuleOp : SPV_Op<"module",
implicitly capture values from the enclosing environment.
This op has only one region, which only contains one block. The block
- must be terminated via the `spv._module_end` op.
+ must be terminated via the `spv.mlir.endmodule` op.
<!-- End of AutoGen section -->
@@ -443,7 +443,7 @@ def SPV_ModuleOp : SPV_Op<"module",
// -----
-def SPV_ModuleEndOp : SPV_Op<"_module_end", [InModuleScope, Terminator]> {
+def SPV_ModuleEndOp : SPV_Op<"mlir.endmodule", [InModuleScope, Terminator]> {
let summary = "The pseudo op that ends a SPIR-V module";
let description = [{
diff --git a/mlir/test/Conversion/SPIRVToLLVM/module-ops-to-llvm.mlir b/mlir/test/Conversion/SPIRVToLLVM/module-ops-to-llvm.mlir
index a2dbd19c0ab4..03baad77647b 100644
--- a/mlir/test/Conversion/SPIRVToLLVM/module-ops-to-llvm.mlir
+++ b/mlir/test/Conversion/SPIRVToLLVM/module-ops-to-llvm.mlir
@@ -16,7 +16,7 @@ spv.module Logical GLSL450 requires #spv.vce<v1.0, [Shader], [SPV_KHR_16bit_stor
// CHECK: module
spv.module Logical GLSL450 {
// CHECK: }
- spv._module_end
+ spv.mlir.endmodule
}
// CHECK: module
diff --git a/mlir/test/Dialect/SPIRV/structure-ops.mlir b/mlir/test/Dialect/SPIRV/structure-ops.mlir
index af1f5484d23a..9d0a476c4763 100644
--- a/mlir/test/Dialect/SPIRV/structure-ops.mlir
+++ b/mlir/test/Dialect/SPIRV/structure-ops.mlir
@@ -390,10 +390,10 @@ spv.module Logical GLSL450
requires #spv.vce<v1.0, [Shader], [SPV_KHR_16bit_storage]>
attributes {foo = "bar"} { }
-// Module with explicit spv._module_end
+// Module with explicit spv.mlir.endmodule
// CHECK: spv.module
spv.module Logical GLSL450 {
- spv._module_end
+ spv.mlir.endmodule
}
// Module with function
@@ -442,8 +442,8 @@ spv.module Logical GLSL450 {
// -----
// Module with wrong terminator
-// expected-error at +2 {{expects regions to end with 'spv._module_end'}}
-// expected-note at +1 {{in custom textual format, the absence of terminator implies 'spv._module_end'}}
+// expected-error at +2 {{expects regions to end with 'spv.mlir.endmodule'}}
+// expected-note at +1 {{in custom textual format, the absence of terminator implies 'spv.mlir.endmodule'}}
"spv.module"() ({
%0 = spv.constant true
}) {addressing_model = 0 : i32, memory_model = 1 : i32} : () -> ()
@@ -477,12 +477,12 @@ spv.module Logical GLSL450 {
// -----
//===----------------------------------------------------------------------===//
-// spv._module_end
+// spv.mlir.endmodule
//===----------------------------------------------------------------------===//
func @module_end_not_in_module() -> () {
// expected-error @+1 {{op must appear in a module-like op's block}}
- spv._module_end
+ spv.mlir.endmodule
}
// -----
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