[llvm-testresults] buildbot failure in lab.llvm.org on phase1 - sanity

[llvmlab-buildmaster at lab.llvm.org]

The Buildbot has detected a new failure on builder phase1 - sanity while building llvm.
Full details are available at:
 http://lab.llvm.org:8013/builders/phase1%20-%20sanity/builds/18026

Buildbot URL: http://lab.llvm.org:8013/

Buildslave for this Build: macpro1

Build Reason: scheduler
Build Source Stamp: 204058
Blamelist: aaronballman,anemet,emaste,tstellar

BUILD FAILED: failed

sincerely,
 -The Buildbot


================================================================================

CHANGES:
Files:
 include/clang/Sema/Scope.h
 lib/Sema/SemaLookup.cpp
On: http://10.1.1.2/svn/llvm-project
For: cfe
At: Mon 17 Mar 2014 10:10:33
Changed By: aaronballman
Comments: [C++11] Replacing Scope iterators using_directives_begin() and using_directives_end() with iterator_range using_directives(). Updating all of the usages of the iterators with range-based for loops, and removing the no-longer-needed iterator versions.Properties: 




File: lib/Target/R600/SIInstrInfo.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 17 Mar 2014 10:10:33
Changed By: tstellar
Comments: R600/SI: Add generic checks to SIInstrInfo::verifyInstruction()

Added checks for number of operands and operand register classes.

Tested-by: Michel Dänzer <michel.daenzer at amd.com>Properties: 




Files:
 lib/Target/R600/AMDGPUAsmPrinter.cpp
 lib/Target/R600/SIInstructions.td
 lib/Target/R600/SILowerControlFlow.cpp
 lib/Target/R600/SIRegisterInfo.td
 test/CodeGen/R600/private-memory.ll
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 17 Mar 2014 10:10:33
Changed By: tstellar
Comments: R600/SI: Use correct dest register class for V_READFIRSTLANE_B32

This instructions writes to an 32-bit SGPR.  This change required adding
the 32-bit VCC_LO and VCC_HI registers, because the full VCC register
is 64 bits.

This fixes verifier errors on several of the indirect addressing piglit
tests.

Tested-by: Michel Dänzer <michel.daenzer at amd.com>Properties: 




Files:
 lib/Target/R600/SIInstrInfo.cpp
 test/CodeGen/R600/v_cndmask.ll
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 17 Mar 2014 10:10:33
Changed By: tstellar
Comments: R600/SI: Fix implementation of isInlineConstant() used by the verifier

The type of the immediates should not matter as long as the encoding is
equivalent to the encoding of one of the legal inline constants.

Tested-by: Michel Dänzer <michel.daenzer at amd.com>Properties: 




File: source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
On: http://10.1.1.2/svn/llvm-project
For: lldb
At: Mon 17 Mar 2014 10:16:33
Changed By: emaste
Comments: Update copy-and-pasted log message
Properties: 




Files:
 include/llvm/CodeGen/ValueTypes.h
 lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
 lib/Target/X86/X86ISelLowering.cpp
 test/CodeGen/X86/avx-cvt-2.ll
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Mon 17 Mar 2014 10:16:33
Changed By: anemet
Comments: [VectorLegalizer/X86] Don't unvectorize fp_to_uint for v8f32->v8i16

Rather than LegalizeAction::Expand, this needs LegalizeAction::Promote to get
promoted to fp_to_sint v8f32->v8i32.  This is a legal operation on AVX.

For that to work properly, we also need to teach the legalizer about the
specific promotion required here.  The default vector promotion uses
bitcasting to a vector type of the same total size.  We want to promote the
vector element type, effectively widening the operation and then truncating
the result.  This is analogous to the current logic of how int_to_fp is
promoted.

The change also factors out some code from the int_to_fp promotion code to
ValueType::widenIntegerVectorElementType.  This is now shared between
int_to_fp and fp_to_int.

There is no longer need for the custom lowering of fp_to_sint f32->v8i16 in
X86.  It can now go through the new target-independent fp_to_*int promotion
logic.

I also checked that no other target uses Promote for these ops yet, so there
shouldn't be any unexpected change in behavior.

Fixes <rdar://problem/16202247>Properties: 




LOGS: