[llvm-testresults] buildbot failure in lab.llvm.org on phase1 - sanity

[llvmlab-buildmaster at lab.llvm.org]

The Buildbot has detected a new failure on builder phase1 - sanity while building llvm.
Full details are available at:
 http://lab.llvm.org:8013/builders/phase1%20-%20sanity/builds/15814

Buildbot URL: http://lab.llvm.org:8013/

Buildslave for this Build: macpro1

Build Reason: scheduler
Build Source Stamp: 200351
Blamelist: dwmw2

BUILD FAILED: failed

sincerely,
 -The Buildbot


================================================================================

CHANGES:
Files:
 include/llvm/CodeGen/AsmPrinter.h
 include/llvm/MC/MCObjectStreamer.h
 include/llvm/MC/MCStreamer.h
 lib/CodeGen/AsmPrinter/AsmPrinter.cpp
 lib/LTO/LTOModule.cpp
 lib/MC/MCAsmStreamer.cpp
 lib/MC/MCNullStreamer.cpp
 lib/MC/MCObjectStreamer.cpp
 lib/Target/AArch64/AArch64AsmPrinter.cpp
 lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
 lib/Target/AArch64/MCTargetDesc/AArch64ELFStreamer.cpp
 lib/Target/ARM/ARMAsmPrinter.cpp
 lib/Target/ARM/AsmParser/ARMAsmParser.cpp
 lib/Target/ARM/MCTargetDesc/ARMELFStreamer.cpp
 lib/Target/Hexagon/HexagonAsmPrinter.cpp
 lib/Target/MSP430/MSP430AsmPrinter.cpp
 lib/Target/Mips/AsmParser/MipsAsmParser.cpp
 lib/Target/Mips/MipsAsmPrinter.cpp
 lib/Target/NVPTX/NVPTXAsmPrinter.cpp
 lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
 lib/Target/PowerPC/PPCAsmPrinter.cpp
 lib/Target/R600/AMDGPUMCInstLower.cpp
 lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
 lib/Target/Sparc/SparcAsmPrinter.cpp
 lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
 lib/Target/SystemZ/SystemZAsmPrinter.cpp
 lib/Target/X86/AsmParser/X86AsmParser.cpp
 lib/Target/X86/X86MCInstLower.cpp
 lib/Target/XCore/XCoreAsmPrinter.cpp
 tools/llvm-mc/Disassembler.cpp
 utils/TableGen/PseudoLoweringEmitter.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Tue 28 Jan 2014 15:21:51
Changed By: dwmw2
Comments: Change MCStreamer EmitInstruction interface to take subtarget infoProperties: 




Files:
 include/llvm/MC/MCELFStreamer.h
 include/llvm/MC/MCObjectStreamer.h
 lib/MC/MCELFStreamer.cpp
 lib/MC/MCMachOStreamer.cpp
 lib/MC/MCObjectStreamer.cpp
 lib/MC/MCPureStreamer.cpp
 lib/MC/WinCOFFStreamer.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Tue 28 Jan 2014 15:21:52
Changed By: dwmw2
Comments: Modify MCObjectStreamer EmitInstTo* interface

Add MCSubtargetInfo parameter
virtual void EmitInstToFragment(const MCInst &Inst, const MCSubtargetInfo &);
virtual void EmitInstToData(const MCInst &Inst, const MCSubtargetInfo &);Properties: 




Files:
 include/llvm/MC/MCAssembler.h
 lib/MC/MCObjectStreamer.cpp
 lib/MC/MCPureStreamer.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Tue 28 Jan 2014 15:21:52
Changed By: dwmw2
Comments: Keep the MCSubtargetInfo in the MCRelxableFragment class.

Needed to fix PR18303 to correctly re-encode the instruction if it
is relaxed.

We keep a copy of the MCSubtargetInfo to make sure that we are not
effected by future changes to the subtarget info coming from the
assembler (e.g. when parsing .code 16 directived).Properties: 




Files:
 include/llvm/MC/MCCodeEmitter.h
 lib/MC/MCAsmStreamer.cpp
 lib/MC/MCAssembler.cpp
 lib/MC/MCELFStreamer.cpp
 lib/MC/MCMachOStreamer.cpp
 lib/MC/MCObjectStreamer.cpp
 lib/MC/MCPureStreamer.cpp
 lib/MC/WinCOFFStreamer.cpp
 lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
 lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
 lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
 lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
 lib/Target/R600/AMDGPUMCInstLower.cpp
 lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
 lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp
 lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
 lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
 lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Tue 28 Jan 2014 15:21:52
Changed By: dwmw2
Comments: Explictly pass MCSubtargetInfo to MCCodeEmitter::EncodeInstruction()Properties: 




Files:
 lib/Target/AArch64/MCTargetDesc/AArch64MCCodeEmitter.cpp
 lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
 lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
 lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
 lib/Target/R600/MCTargetDesc/AMDGPUMCCodeEmitter.h
 lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
 lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp
 lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
 lib/Target/SystemZ/MCTargetDesc/SystemZMCCodeEmitter.cpp
 utils/TableGen/CodeEmitterGen.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Tue 28 Jan 2014 15:21:52
Changed By: dwmw2
Comments: Propagate MCSubtargetInfo through TableGen's getBinaryCodeForInstr()Properties: 




Files:
 lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
 lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp
 lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
 lib/Target/R600/MCTargetDesc/R600MCCodeEmitter.cpp
 lib/Target/R600/MCTargetDesc/SIMCCodeEmitter.cpp
 lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Tue 28 Jan 2014 15:21:52
Changed By: dwmw2
Comments: Delete MCSubtargetInfo data members from target MCCodeEmitter classes

The subtarget info is explicitly passed to the EncodeInstruction
method and we should use that subtarget info to influence any
encoding decisions.Properties: 




Files:
 test/CodeGen/ARM/inlineasm-mode-switch.ll
 test/MC/ARM/fixup-cpu-mode.s
 test/MC/X86/fixup-cpu-mode.s
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Tue 28 Jan 2014 15:21:52
Changed By: dwmw2
Comments: Tests for mode switching

1. test that inlineasm works
2. test that relaxable instructions are re-encoded in the correct mode.Properties: 




LOGS: