[llvm-testresults] buildbot failure in lab.llvm.org on phase1 - sanity

[llvmlab-buildmaster at lab.llvm.org]

The Buildbot has detected a new failure on builder phase1 - sanity while building llvm.
Full details are available at:
 http://lab.llvm.org:8013/builders/phase1%20-%20sanity/builds/12587

Buildbot URL: http://lab.llvm.org:8013/

Buildslave for this Build: macpro1

Build Reason: scheduler
Build Source Stamp: 192352
Blamelist: haoliu

BUILD FAILED: failed

sincerely,
 -The Buildbot


================================================================================

CHANGES:
Files:
 include/clang/Basic/arm_neon.td
 lib/CodeGen/CGBuiltin.cpp
 test/CodeGen/aarch64-neon-intrinsics.c
On: http://10.1.1.2/svn/llvm-project
For: cfe
At: Thu 10 Oct 2013 08:06:35
Changed By: haoliu
Comments: Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem). 
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).

E.g. ld1(3 registers version) will load 32-bit elements {A, B, C, D, E, F} sequentially into the three 64-bit vectors list {BA, DC, FE}.
E.g. ld3 will load 32-bit elements {A, B, C, D, E, F} into the three 64-bit vectors list {DA, EB, FC}.

Properties: 




Files:
 include/llvm/CodeGen/ValueTypes.h
 lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
 lib/Target/AArch64/AArch64ISelLowering.cpp
 lib/Target/AArch64/AArch64ISelLowering.h
 lib/Target/AArch64/AArch64InstrFormats.td
 lib/Target/AArch64/AArch64InstrNEON.td
 lib/Target/AArch64/AArch64RegisterInfo.td
 lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
 lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
 lib/Target/AArch64/InstPrinter/AArch64InstPrinter.cpp
 lib/Target/AArch64/InstPrinter/AArch64InstPrinter.h
 lib/Target/AArch64/Utils/AArch64BaseInfo.h
 test/CodeGen/AArch64/neon-simd-ldst-multi-elem.ll
 test/MC/AArch64/neon-diagnostics.s
 test/MC/AArch64/neon-simd-ldst-multi-elem.s
On: http://10.1.1.2/svn/llvm-project
For: llvm
At: Thu 10 Oct 2013 08:06:36
Changed By: haoliu
Comments: Implement AArch64 vector load/store multiple N-element structure class SIMD(lselem).
Including following 14 instructions:
4 ld1 insts: load multiple 1-element structure to sequential 1/2/3/4 registers.
ld2/ld3/ld4: load multiple N-element structure to sequential N registers (N=2,3,4).
4 st1 insts: store multiple 1-element structure from sequential 1/2/3/4 registers.
st2/st3/st4: store multiple N-element structure from sequential N registers (N = 2,3,4).

Properties: 




LOGS: