[llvm-testresults] buildbot failure in smooshlab on llvm-gcc-powerpc-darwin9

daniel_dunbar at apple.com daniel_dunbar at apple.com
Thu May 20 20:47:26 PDT 2010


The Buildbot has detected a new failure of llvm-gcc-powerpc-darwin9 on smooshlab.
Full details are available at:
 http://smooshlab.apple.com:8010/builders/llvm-gcc-powerpc-darwin9/builds/2722

Buildbot URL: http://smooshlab.apple.com:8010/

Buildslave for this Build: spang.apple.com

Build Reason: 
Build Source Stamp: 104310
Blamelist: ddunbar,dgregor,dpatel,evancheng,fjahanian,johannes,lattner,rjmccall

BUILD FAILED: failed test.llvm.stage1 test.llvm.stage2

sincerely,
 -The Buildbot


================================================================================

CHANGES:
Files:
 include/llvm/CodeGen/ScheduleDAG.h
 include/llvm/Target/TargetLowering.h
 include/llvm/Target/TargetMachine.h
 lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.cpp
 lib/CodeGen/SelectionDAG/ScheduleDAGSDNodes.h
 lib/Target/ARM/ARMISelLowering.cpp
 lib/Target/ARM/ARMISelLowering.h
At: Thu 20 May 2010 16:32:26
Changed By: evancheng
Comments: Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode.Properties: 




Files:
 include/clang/Basic/DiagnosticLexKinds.td
 test/Lexer/hexfloat.cpp
At: Thu 20 May 2010 16:37:19
Changed By: lattner
Comments: Don't warn about use of hex floats in c++ mode by default,
matching G++'s behavior.

Warn when -pedantic or -Wc++-hex-floats is passed, and
don't warn if -pedantic -Wno-c++-hex-floats are both passed.
Properties: 




Files:
 lib/Sema/SemaDeclCXX.cpp
 test/CodeGenObjC/objc-gc-aggr-assign.m
At: Thu 20 May 2010 16:37:19
Changed By: fjahanian
Comments: Generate objc_memmove_collectable write-barrier for 
classes whose base class have GC'able object pointers.

Properties: 




Files:
 include/clang/Basic/DiagnosticGroups.td
 include/clang/Basic/DiagnosticLexKinds.td
At: Thu 20 May 2010 16:47:22
Changed By: lattner
Comments: make -Wc++-hex-floats be a member of -Wc++0x-compat,
thanks to doug for pointing this out!
Properties: 




File: lib/Support/PrettyStackTrace.cpp
At: Thu 20 May 2010 16:52:16
Changed By: ddunbar
Comments: Fix __crashreport_info__ declaration.Properties: 




Files:
 lib/Sema/SemaDeclCXX.cpp
 test/SemaCXX/warn-reorder-ctor-initialization.cpp
At: Thu 20 May 2010 16:52:16
Changed By: dgregor
Comments: Fix a crasher in constructor-initializer reordering warnings (PR7179).

Properties: 




File: tools/libclang/CIndex.cpp
At: Thu 20 May 2010 16:52:16
Changed By: ddunbar
Comments: Fix __crashreport_info__ declaration.Properties: 




File: lib/CodeGen/AsmPrinter/DwarfDebug.cpp
At: Thu 20 May 2010 17:12:16
Changed By: dpatel
Comments: Simplify.
Properties: 




File: tools/llvm-mc/llvm-mc.cpp
At: Thu 20 May 2010 17:32:21
Changed By: ddunbar
Comments: Remove dead option.Properties: 




File: docs/tools/clang.pod
At: Thu 20 May 2010 17:32:21
Changed By: ddunbar
Comments: docs: Man page tweaks, to mention the integrated assembler and the
-integrated-as and -no-integrated-as options.Properties: 




Files:
 lib/Sema/SemaTemplateInstantiateDecl.cpp
 test/SemaTemplate/instantiate-anonymous-union.cpp
At: Thu 20 May 2010 17:37:21
Changed By: dgregor
Comments: When instantiating anonymous structs/unions within a function, make
sure that the anonymous struct/union record declaration gets
instantiated before the variable declaration, and that it and its
fields (recursively) get entries in the local instantiation map. Fixes
PR7088.
Properties: 




File: lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
At: Thu 20 May 2010 17:44:01
Changed By: evancheng
Comments: Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid.Properties: 




Files:
 lib/Target/ARM/ARMISelLowering.cpp
 test/CodeGen/ARM/fabss.ll
 test/CodeGen/ARM/fadds.ll
 test/CodeGen/ARM/fdivs.ll
 test/CodeGen/ARM/fmacs.ll
 test/CodeGen/ARM/fmscs.ll
 test/CodeGen/ARM/fmuls.ll
 test/CodeGen/ARM/fnmscs.ll
 test/CodeGen/ARM/reg_sequence.ll
At: Thu 20 May 2010 17:49:17
Changed By: evancheng
Comments: Change ARM scheduling default to list-hybrid if the target supports floating point instructions (and is not using soft float).
Properties: 




Files:
 lib/Target/X86/X86ISelLowering.cpp
 lib/Target/X86/X86ISelLowering.h
 test/CodeGen/X86/2010-05-16-nosseconversion.ll
At: Thu 20 May 2010 17:54:05
Changed By: johannes
Comments: Fix i64->f64 conversion, x86-64, -no-sse.  A bit
tricky since there's a 3rd 64-bit type, MMX vectors.
PR 7135.

Properties: 




Files:
 include/clang/AST/Decl.h
 lib/AST/Decl.cpp
 lib/Sema/SemaExpr.cpp
At: Thu 20 May 2010 18:24:01
Changed By: rjmccall
Comments: Introduce a method to get from an anonymous struct or union record declaration
to the associated object declaration.

Properties: 




Files:
 lib/CodeGen/CGClass.cpp
 lib/CodeGen/CGExpr.cpp
 lib/CodeGen/CodeGenFunction.h
 test/CodeGenCXX/anonymous-union-member-initializer.cpp
At: Thu 20 May 2010 18:24:01
Changed By: rjmccall
Comments: When emitting an lvalue for an anonymous struct or union member during
class initialization, drill down through an arbitrary number of anonymous
records.

Properties: 




LOGS:
Last 10 lines of 'stdio':
	    LLVM :: CodeGen/X86/mmx-shift.ll
	    LLVM :: CodeGen/X86/mmx-vzmovl-2.ll
	    LLVM :: CodeGen/X86/mmx-vzmovl.ll
	
	  Expected Passes    : 4730
	  Expected Failures  : 27
	  Unsupported Tests  : 526
	  Unexpected Failures: 4
	make[1]: *** [check-local-lit] Error 1
	make: *** [check-lit] Error 2

Last 10 lines of 'fail':
	LLVM :: CodeGen/X86/2010-05-16-nosseconversion.ll
	LLVM :: CodeGen/X86/mmx-shift.ll
	LLVM :: CodeGen/X86/mmx-vzmovl-2.ll
	LLVM :: CodeGen/X86/mmx-vzmovl.ll

Last 10 lines of 'xfail':
	LLVM :: MC/AsmParser/X86/x86_32-bit_cat.s
	LLVM :: MC/AsmParser/X86/x86_32-encoding.s
	LLVM :: MC/AsmParser/X86/x86_32-mismatched-add.s
	LLVM :: MC/AsmParser/directive_lsym.s
	LLVM :: MC/AsmParser/exprs-invalid.s
	LLVM :: Transforms/DeadArgElim/deadexternal.ll
	LLVM :: Transforms/GVN/rle-no-phi-translate.ll
	LLVM :: Transforms/IndVarSimplify/loop_evaluate_6.ll
	LLVM :: Transforms/TailCallElim/nocapture.ll
	LLVM :: Transforms/TailDup/2008-06-11-AvoidDupLoopHeader.ll

Last 10 lines of 'unsupported':
	LLVM :: LLVMC/C++/hello.cpp
	LLVM :: LLVMC/C++/together.cpp
	LLVM :: LLVMC/C/emit-llvm.c
	LLVM :: LLVMC/C/hello.c
	LLVM :: LLVMC/C/include.c
	LLVM :: LLVMC/C/opt-test.c
	LLVM :: LLVMC/C/sink.c
	LLVM :: LLVMC/C/wall.c
	LLVM :: LLVMC/ObjC++/hello.mm
	LLVM :: LLVMC/ObjC/hello.m

Last 10 lines of '2010-05-16-nosseconversion.ll':
	          0x183c158: i64 = X86ISD::WrapperRIP 0x183bc90 [ID=11]
	            0x183bc90: i64 = TargetGlobalAddress<i64* @x> 0 [TF=5] [ID=4]
	          0x183bd18: i64 = undef [ORD=1] [ID=1]
	        0x183bd18: i64 = undef [ORD=1] [ID=1]
	      0x183c400: i64 = Constant<4294967295> [ID=7]
	    0x183c268: i64 = Constant<4841369599423283200> [ID=5]
	--
	
	********************
	

Last 10 lines of 'mmx-shift.ll':
	Command Output (stdout):
	--
		psllq	$32, %mm0
	--
	Command Output (stderr):
	--
	--
	
	********************
	

Last 10 lines of 'mmx-vzmovl-2.ll':
	Exit Code: 1
	Command Output (stdout):
	--
	--
	Command Output (stderr):
	--
	--
	
	********************
	

Last 10 lines of 'mmx-vzmovl.ll':
	Exit Code: 1
	Command Output (stdout):
	--
	--
	Command Output (stderr):
	--
	--
	
	********************
	

Last 10 lines of 'stdio':
	    LLVM :: CodeGen/X86/mmx-shift.ll
	    LLVM :: CodeGen/X86/mmx-vzmovl-2.ll
	    LLVM :: CodeGen/X86/mmx-vzmovl.ll
	
	  Expected Passes    : 5177
	  Expected Failures  : 41
	  Unsupported Tests  : 65
	  Unexpected Failures: 4
	make[1]: *** [check-local-lit] Error 1
	make: *** [check-lit] Error 2

Last 10 lines of 'fail':
	LLVM :: CodeGen/X86/2010-05-16-nosseconversion.ll
	LLVM :: CodeGen/X86/mmx-shift.ll
	LLVM :: CodeGen/X86/mmx-vzmovl-2.ll
	LLVM :: CodeGen/X86/mmx-vzmovl.ll

Last 10 lines of 'xfail':
	LLVM :: MC/AsmParser/X86/x86_32-bit_cat.s
	LLVM :: MC/AsmParser/X86/x86_32-encoding.s
	LLVM :: MC/AsmParser/X86/x86_32-mismatched-add.s
	LLVM :: MC/AsmParser/directive_lsym.s
	LLVM :: MC/AsmParser/exprs-invalid.s
	LLVM :: Transforms/DeadArgElim/deadexternal.ll
	LLVM :: Transforms/GVN/rle-no-phi-translate.ll
	LLVM :: Transforms/IndVarSimplify/loop_evaluate_6.ll
	LLVM :: Transforms/TailCallElim/nocapture.ll
	LLVM :: Transforms/TailDup/2008-06-11-AvoidDupLoopHeader.ll

Last 10 lines of 'unsupported':
	LLVM :: FrontendObjC/2009-04-28-bitfield-vs-vbc.m
	LLVM :: FrontendObjC/2009-08-05-utf16.m
	LLVM :: FrontendObjC/2009-08-17-DebugInfo.m
	LLVM :: FrontendObjC/2009-11-30-Objc-ID.m
	LLVM :: FrontendObjC/2010-02-01-utf16-with-null.m
	LLVM :: FrontendObjC/2010-02-11-fwritable-stringsBug.m
	LLVM :: FrontendObjC/2010-02-23-DbgInheritance.m
	LLVM :: FrontendObjC/2010-03-17-StructRef.m
	LLVM :: LLVMC/ObjC++/hello.mm
	LLVM :: LLVMC/ObjC/hello.m

Last 10 lines of '2010-05-16-nosseconversion.ll':
	          0x183c158: i64 = X86ISD::WrapperRIP 0x183bc90 [ID=11]
	            0x183bc90: i64 = TargetGlobalAddress<i64* @x> 0 [TF=5] [ID=4]
	          0x183bd18: i64 = undef [ORD=1] [ID=1]
	        0x183bd18: i64 = undef [ORD=1] [ID=1]
	      0x183c400: i64 = Constant<4294967295> [ID=7]
	    0x183c268: i64 = Constant<4841369599423283200> [ID=5]
	--
	
	********************
	

Last 10 lines of 'mmx-shift.ll':
	Command Output (stdout):
	--
		psllq	$32, %mm0
	--
	Command Output (stderr):
	--
	--
	
	********************
	

Last 10 lines of 'mmx-vzmovl-2.ll':
	Exit Code: 1
	Command Output (stdout):
	--
	--
	Command Output (stderr):
	--
	--
	
	********************
	

Last 10 lines of 'mmx-vzmovl.ll':
	Exit Code: 1
	Command Output (stdout):
	--
	--
	Command Output (stderr):
	--
	--
	
	********************
	




More information about the llvm-testresults mailing list